- 16 8月, 2016 40 次提交
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由 Max Filippov 提交于
DC233C is an xtensa processor with full MMUv3 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Chris Zankel 提交于
DC232B is an xtensa processor with full MMUv2 capable of running Linux. Core information files are autogenerated from the processor description and are not meant to be edited. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Chris Zankel 提交于
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Chris Zankel 提交于
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: NChris Zankel <chris@zankel.net> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Jon Medhurst \(Tixy\) 提交于
The firmware on TC2 needs to be configured appropriately before booting in nonsec mode will work as expected, so test for this and fall back to sec mode if required. Signed-off-by: NJon Medhurst <tixy@linaro.org> Reviewed-by: NRyan Harkin <ryan.harkin@linaro.org> Tested-by: NRyan Harkin <ryan.harkin@linaro.org>
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由 Wenyou Yang 提交于
Convert the driver to the driver model while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Reviewed-by: NHeiko Schocher <hs@denx.de>
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由 Wenyou Yang 提交于
Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
Add device tree for SAMA5D2 Xplained board. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
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由 Wenyou Yang 提交于
Bring in required device tree file and bindings from Linux. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
AT91 PIO4 controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. The pin configuration is performed on specific registers which are shared along with the gpio controller. So regard the pinctrl device as a child of atmel_pio4 device. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Wenyou Yang 提交于
Rework the driver to support driver model and device tree, and support to regard the pio4 pinctrl device as a child of atmel_pio4 device. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andreas Bießmann 提交于
Fix compile warning for non OF_CONTROL builds: ---8<--- In file included from /Volumes/devel/u-boot/drivers/gpio/atmel_pio4.c:10:0: /Volumes/devel/u-boot/include/clk.h:107:12: warning: 'clk_get_by_name' defined but not used [-Wunused-function] --->8--- Signed-off-by: NAndreas Bießmann <andreas@biessmann.org> Acked-by: NStephen Warren <swarren@nvidia.com>
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由 Joe Hershberger 提交于
The cleanup of the legacy mii registration API that's no longer used now that the drivers have been converted to use the (more) modern API. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Joe Hershberger 提交于
If the functions passed to the registration function are not in the same C file (extern) then spatch will not handle the dependent changes. Make those changes manually. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> For the 4xx related files: Acked-by: NStefan Roese <sr@denx.de> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Joe Hershberger 提交于
Some of the changes were a bit too complex. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Joe Hershberger 提交于
Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Joe Hershberger 提交于
Many Ethernet drivers still use the legacy miiphy API to register their mdio interface for access to the mdio commands. This semantic patch will convert the drivers from the legacy adapter API to the more modern alloc/register API. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Wenyou Yang 提交于
The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 mario.six@gdsys.cc 提交于
Commit 302c5dba ("dm: tpm: Add Driver Model support for tpm_atmel_twi driver") converted the Atmel TWI TPM driver itself to driver model, but kept the legacy-style i2c_write/i2c_read calls. Commit 3e7d940b ("dm: tpm: Every TPM drivers should depends on DM_TPM") then made DM_I2C a dependency of the driver, effectively forcing users to turn on CONFIG_DM_I2C_COMPAT to get it to work. This patch adds the necessary dm_i2c_write/dm_i2c_read calls to make the driver compatible with DM, but also keeps the legacy calls in ifdefs, so that the driver is now compatible with both DM and non-DM setups. Signed-off-by: NMario Six <mario.six@gdsys.cc> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Songjun Wu 提交于
DT binding documentation for atmel i2c driver. Signed-off-by: NSongjun Wu <songjun.wu@atmel.com> Reviewed-by: NHeiko Schocher <hs@denx.de> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Songjun Wu 提交于
Add i2c driver. Signed-off-by: NSongjun Wu <songjun.wu@atmel.com> Reviewed-by: NHeiko Schocher <hs@denx.de> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Max Filippov 提交于
Implement MDIO bus read/write functions, initialize the bus and scan for the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
The ethoc device can be configured to have a private memory region instead of having access to the main memory. In that case egress packets must be copied into that memory for transmission and pointers to that memory need to be passed to net_process_received_packet or returned from the recv callback. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
Addresses used in buffer descriptors and passed in platform data or device tree are physical. Addresses used by CPU to access packet data and registers are virtual. Don't mix these addresses and use virt_to_phys for translation. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
Add .of_match table and .ofdata_to_platdata callback to allow for ethoc device configuration from the device tree. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
Extract reusable parts from ethoc_init, ethoc_set_mac_address, ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH. Add U_BOOT_DRIVER, eth_ops structure and implement required methods. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
Don't use physical base address of registers directly, ioremap it first. Save pointer in private struct ethoc and use that struct in all internal functions. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Max Filippov 提交于
Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the only board configuration that uses it and put it into that board's defconfig. Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Alban Bedel 提交于
When adding support for the driver model the SPI EEPROM feature had been ignored. Fix the build with both CONFIG_DM_ETH and CONFIG_E1000_SPI enabled. Signed-off-by: NAlban Bedel <alban.bedel@avionic-design.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Chris Packham 提交于
The __get_unaligned_le* functions may not be declared on all platforms. Instead, get_unaligned_le* should be used. On many platforms both of these are the same function. Signed-off-by: NChris Packham <judge.packham@gmail.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Wenyou Yang 提交于
Use the right phy_connect() prototype for CONFIGF_DM_ETH. Support to get the phy interface from dt and set GMAC_UR. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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由 Bibek Basu 提交于
Program vdd_core for Jetson TK1 to 1V, which is the max safe voltage for ultra low temperature operations. vdd_cpu and vdd_gpu are already at 1V. Signed-off-by: NBibek Basu <bbasu@nvidia.com> (swarren: fixed comments to better match the code) (swarren: moved board ifdef around data in header, made code generic) (swarren: fixed typos in commit description) Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Bryan Wu 提交于
The L4T kernel complains about a CSITE clock rate above 144MHz, presumably because the HW is only characterized for a clock less than that. Adjust the rate to 136MHz to avoid the warning and stay in spec. Signed-off-by: NBryan Wu <pengw@nvidia.com> (swarren, re-wrote commit description) Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Trimslice currently stores its environment at 512KiB into the SPI flash chip. The U-Boot binary has grown such that the size of the boot image (which includes the Tegra BCT, padding, and the U-Boot binary) is slightly larger than 512K now. Consequently, writing the boot image to flash corrupts the saved environment, and equally, writing to or erasing the environment will corrupt the bootloader, which in turn will cause the Tegra boot ROM to enter recovery mode during boot, making it look as if the system is non-operational. Note that tegra-uboot-flasher writes to the environment during the flashing process. Solve this by moving the environment as high as possible in flash. This will allow the U-Boot binary to roughly double in size before this problem is hit again, at which point there's nothing we can do anyway since the binary won't fit into flash. 99% of other Tegra boards store the environment in eMMC and use a negative value for CONFIG_ENV_OFFSET, which already automatically places the environment as near the end of boot flash as possible. The 1 remaining board hard-codes CONFIG_ENV_OFFSET to 2MiB, which allows for plenty more bloat. Reported-by: NStephen L Arnold <nerdboy@gentoo.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Currently, ft_system_setup() is implemented by board*.c, which are a bit of a dumping ground for a bunch of unrelated functionality, and separate versions exist for pre-Tegra186 and Tegra186. Move the implementation into a separate file to separate functionality, and allow sharing. Signed-off-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI connector (which may run at x2 electrically, depending on the board version and configuration) and a x1 connection to the M.2 slot (which may not be active, depending on the board version and configuration). This change enables those. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Stephen Warren 提交于
Now that clock and reset drivers exist for Tegra186, we can enable the SD card controller. Now that a BPMP I2C driver exists for Tegra186, we can communicate with the PMIC to enable power to the SD card. Hook up the DT content and board code required to make the SD card work. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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