Now all the AVR32 boards have been converted into Generic Board.
Select it in Kconfig and clean up defines in header files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NAndreas Bießmann <andreas.devel@googlemail.com>

On AM437x-GP Evm there is 2GB of DDR3 memory available as stated in
AM437x GP EVM HardwareUser's guide http://www.ti.com/lit/ug/spruhw7/spruhw7.pdf.
But MAX_RAM_BANK_SIZE is defined as 1GB.
Fixing MAX_RAM_BANK_SIZE to 2GB on AM43xx.
Reported-by: NShivasharan Nagalikar <shivasharan.nagalikar@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The recent changes for hw leveling on am33xx were not intended for
DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
value to check against. This lets us pass in the value we would use to
configure, when we have not yet configured the board yet.  In other cases
update the call to be as functional as before and check an already
programmed value in.
Tested-by: NYan Liu <yan-liu@ti.com>
Signed-off-by: NTom Rini <trini@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

On AM57xx evm I2C5 is used to detect the LCD board by reading the
EEPROM present on the bus.
Enable i2c5 clocks to help that.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Enable booting from NAND on the am437xx-evm.
Signed-off-by: NTom Rini <trini@ti.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

We almost always use UBIFS for user accessible NAND file systems and
the UBIFS file system might contain more than one volume within the
single NAND partition. The last NAND partition is therefore more
appropriately named as "NAND.file-system" instead of "NAND.rootfs"

The Linux kernel (as of v3.16) also uses "NAND.file-system" to name the
last NAND partition. This patch makes the partition name consistent
between u-boot and the kernel.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

AM43xx EVMs have NAND so enable it.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

The Calxeda highbank SOC needs a custom sequence to bring up SATA links,
so override ahci_link_up with custom function to handle combophy setup.
Signed-off-by: NMark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Richard Gibbs
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndre Przywara <osp@andrep.de>

The AHCI driver currently waits 5s before timing out when sending a
data command to a drive. Some drives take upwards of 8s to respond to
the initial data command while they're spinning up. Increase the
data io timeout to 10s so that those drives can be found on initial
scsi scan.
Signed-off-by: NMark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: NAndre Przywara <osp@andrep.de>

Enable full 48-bit LBA48 data reads by passing the upper word of the
LBA block pointer in bytes 9 and 10 of the FIS.

This allows uboot to load data from any arbitrary sector on a drive
with 2 or more TB of available data connected to an AHCI controller.
Signed-off-by: NMark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: NAndre Przywara <osp@andrep.de>
[trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop
 warnings on platforms that don't enable that feature ]
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NMark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: NAndre Przywara <osp@andrep.de>

The Calxeda Midway part has A15 cores, which do not have the Highbank
A9's SCU used there for resetting the chip.
Add code to distinguish between the A9 and the A15 and invoke the
appropriate register writes to support the newer part.

Andre: rework detection of Highbank vs. Midway
Rob: fix Andre's reworked detection
Signed-off-by: NMark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: NAndre Przywara <osp@andrep.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Andre: assign names to the magic values
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NAndre Przywara <osp@andrep.de>

Adding the mux data, manual and virtual mode
settings for BeagleBoard-X15.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NRoger Quadros <rogerq@ti.com>

Enable IO delay recalibration sequence.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

Now all manual mode configurations are done as part of
IO delay recalibration sequence, remove the hack done for
CPSW.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Adding the mux data, manual and virtual mode
settings for DRA7-evm.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NVishal Mahaveer <vishalm@ti.com>

Enabling IO delay recalibration sequence for DRA7 EVM.
UART and I2C are configured before IO delay recalibration sequence
as these are used earlier and safe to use.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

In addition to the regular mux configuration, certain pins of DRA7
require to have "manual mode" also programmed, when predefined
delay characteristics cannot be used for the interface.

struct iodelay_cfg_entry is introduced for populating
manual mode IO timings.
For configuring manual mode, along with the normal pad
configuration do the following steps:
- Select MODESELECT field of each assocaited PAD.
  CTRL_CORE_PAD_XXX[8]:MODESELECT = 1(Enable MANUAL_MODE macro along with mux)
- Populate A_DELAY, G_DELAY values that are specified in DATA MANUAL.
  And pass the offset of the CFG_XXX register in iodelay_cfg_entry.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

On DRA7, in addition to the regular muxing of pins, an additional
hardware module called IODelay which is also expected to be
configured. This "IODelay" module has it's own register space that is
independent of the control module.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay recalibration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do muxing as part of IOdelay recalibration.

IODELAY recalibration sequence:
- Complete AVS voltage change on VDD_CORE_L
- Unlock IODLAY config registers.
- Perform IO delay calibration with predefined values.
- Isolate all the IOs
- Update the delay mechanism for each IO with new calibrated values.
- Configure PAD configuration registers
- De-isolate all the IOs.
- Relock IODELAY config registers.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

In addition to the regular mux configuration, certain pins of DRA7
require to have "virtual mode" also programmed.
This allows for predefined delay characteristics to be used by the SoC
to meet timing characterstics needed for the interface.

Provide easy to use macro to do the same.

For configuring virtual mode, along with normal pad configuration add
the following two steps:
- Select MODESELECT field of each assocaited PAD.
  CTRL_CORE_PAD_XXX[8]:MODESELECT = 1
- DELAYMODE filed should be configured with value given in DATA Manual.
  CTRL_CORE_PAD_XXX[7:4]:DELAYMODE =[0-15] (as given in DATA manual).
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

Adopting the pinctrl register definitions from Linux kernel
to be consistent.
Old definitions will be removed once all the pinctrl data
is adapted to new definitions.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

do_set_mux32() is redefined in dra7xx and beagle_x15 boards.
IO delay recalibration sequence also needs this.
Making it generic to avoid duplication.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>

When DLL_CALIB_INTERVAL is set, an extra delay is added
which is not required and it consumes EMIF bandwidth.
So making the DLL_CALIB_CTRL[8:0]DLL_CALIB_INTERVAL bits to 0.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>

Update DDR IO register values.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

DDRIO_2 and LPDDR2CH1_1 registers are not present
for DRA7. So not configuring these registers for DRA7xx
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

A generic is_dra72x cpu check is useful for grouping
all the revisions under that. This is used in the
subsequent patches.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Updating EMIF registers to enable HW leveling
on DRA72-evm.
Also updating the timing registers.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Updating EMIF registers to enable HW leveling
on DRA7-evm.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Updating EMIF registers to enable HW leveling
on BeagleBoard-X15.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

DRA7 EMIF supports Full leveling for DDR3.
Adding support for the Full leveling sequence.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

This commit imports some updates of kconfiglib.py from
https://github.com/ulfalizer/Kconfiglib

 - Warn about and ignore the "allnoconfig_y" Kconfig option
 - Statements in choices inherit menu/if deps
 - Add Symbol.is_allnoconfig_y()
 - Hint that modules are still supported despite warnings.
 - Add warning related to get_defconfig_filename().
 - Fix typo in docs.
 - Allow digits in $-references to symbols.
Signed-off-by: NUlf Magnusson <ulfalizer@gmail.com>
Signed-off-by: NPhilip Craig <philipjcraig@gmail.com>
Signed-off-by: NJakub Sitnicki <jsitnicki@gmail.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Commit e11c6c27 broke calculating lr register
in function save_boot_params() and caused U-Boot to crash at early boot time
on Nokia N900 board.

This patch fix calculating return address in lr register and make Nokia N900
board bootable again. Patch was tested in qemu and also on real N900 HW.
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPali Rohár <pali.rohar@gmail.com>

sometimes it is usefull to know if board-detection has
written the correct value into gd->board_type.

For this we add some output to the bdinfo command.
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>

Commit 9ba9e85f (net: Fix NET_RANDOM_ETHADDR dependencies)
accidentally dropped CONFIG_LIB_RAND defines for 14 Blackfin boards.

Prior to that commit, those boards defined CONFIG_LIB_RAND, but not
CONFIG_NET_RANDOM_ETHADDR.  So, commit 9ba9e85f should not have
touched them, but in fact it ripped CONFIG_LIB_RAND off from all the
header files, which caused undefined reference to srand and rand.
CONFIG_LIB_RAND=y must be revived for such boards.

BTW, this commit indeed makes it better, but even with this fix,
three boards (bf533-stamp, bf538f-ezkit, cm-bf548) still can not
build due to region 'ram' overflowed error.  This was cause by
commit 6eed3786 (net: Move the CMD_NET config to defconfigs)
because CMD_NET selects NET, and NET selects REGEX.  Eventually,
some boards were newly enabled with CONFIG_REGEX, increasing the
memory footprint.  A patch is expected to fix the build error.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Some AVR32 boards were dropped by the following commits:
 9eb45aab (avr32: delete non generic board favr-32-ezkit)
 e3693076 (avr32: delete non generic board hammerhead)
 c62d2f8f (avr32: delete non generic board mimc200)
 e5354b8a (avr32: delete non generic board's atstk100{3, 4, 6})
Acked-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Drop the code that doesn't use driver model for USB.
Signed-off-by: NSimon Glass <sjg@chromium.org>