- 23 4月, 2018 4 次提交
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由 Masahiro Yamada 提交于
Now that the SD/eMMC driver does not use the clock driver in SPL, remove u-boot,dm-pre-reloc properties to let the fdtgrep tool drop the unnecessary nodes. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig. When booting from SD/eMMC, obviously its clock has been properly set up by the boot ROM. Acutually, no need to re-initialize the clock in SPL. Using a clock driver would generalize the SoC specific code, but solving the memory footprint problem would win. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
I need to differentiate the clock handling for uniphier-sd. Move it to each driver's probe function from the tmio common code so that renesas-sdhi will not be affected. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
With the recent changes, the size of the U-Boot proper image for uniphier_v7_defconfig exceeded the current limit, 512KB, then SPL fails to load the whole of the U-Boot proper. Increase the size. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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- 22 4月, 2018 11 次提交
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由 Neil Armstrong 提交于
The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP. Fixes: ca7fdc8b ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration") Reported-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Jean-Jacques Hiblot 提交于
Add the compatibility with "ti,dwc3" and enable it by default if DM_USB is enabled. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Jean-Jacques Hiblot 提交于
This simple glue layer does not require CONFIG_MISC, but it does require CONFIG_DM_USB. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Marek Vasut 提交于
The E2 Silk port was broken since some time. This patch updates the E2 Silk port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- NOTE: The port is missing support for I2C1 for DA9063 reset, since the I2C driver needs to be converted to DM and DT probing. That's not an issue for this patch though, since the reset was broken on Silk since forever.
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由 Marek Vasut 提交于
Migrate the U-Boot configs to Kconfig CONFIG_SH_MMCIF . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
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由 Marek Vasut 提交于
Add Kconfig entry for SH MMCIF driver. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
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由 Marek Vasut 提交于
Add MMC DM and DT probing support into the SH MMCIF driver. This patch abstracts out the common bits of the send command and set ios functions, so they can be used both by DM and non DM setups and adds the DM probe support. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Jaehoon Chung <jh80.chung@samsung.com>
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由 Marek Vasut 提交于
The initconst is not used in U-Boot, drop it. The r8a7794_crit_mod_clks is also not used in U-Boot, so drop it too. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
The initconst is not used in U-Boot, drop it. The r8a7792_crit_mod_clks is also not used in U-Boot, so drop it too. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 19 4月, 2018 2 次提交
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- 18 4月, 2018 14 次提交
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由 Kunihiko Hayashi 提交于
Add reset lines for ethernet controller on each SoC. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Kunihiko Hayashi 提交于
Add clock control for ethernet controller on each SoC. Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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由 Masahiro Yamada 提交于
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
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git://git.denx.de/u-boot-arc由 Tom Rini 提交于
Subtle ARC fixes for v2018.05-RC3 These are only very subtle clean-ups here and there including: * Correctly specified CPU freq for HSDK (production boards are all shipped with 500MHZ as opposed to early batch running at 1GHz) * Addition of SNPS internal group email to MAINTAINERS file * Switch to Hush shell on AXS10x boards
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由 Neil Armstrong 提交于
In the commit "reset: Add get/assert/deassert/release for bulk of reset signals" the disabled reset_release_bulk() and reset_get_bulk() used the wrong struct clk_bulk instead of struct reset_ctl_bulk. Fixes: 0c282339 ("reset: Add get/assert/deassert/release for bulk of reset signals") Reported-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bryan O'Donoghue 提交于
commit b4d956f6 ("bootm: Align cache flush end address correctly") aligns the end address of the cache flush operation to a cache-line size to ensure lower-layers in the code accept the range provided and flush. A similar action should be taken for the begin address of a cache flush operation. The load address may not be aligned to a cache-line boundary, so ensure the passed address is aligned. Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org> Reported-by: NBreno Matheus Lima <brenomatheus@gmail.com> Suggested-by: NTom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: NBreno Lima <breno.lima@nxp.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Neil Armstrong 提交于
This fixes the Coverity Defect CID 175347 when dev_count_phandle_with_args() returns a negative value. Fixes: a855be87 ("clk: Add get/enable/disable/release for a bulk of clocks") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args() returns a negative value. Fixes: 0c282339 ("reset: Add get/assert/deassert/release for bulk of reset signals") Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Marek Vasut 提交于
The M2 Koelsch port was broken since some time. This patch updates the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL for the preloading and puts it on par with the M2 Porter board. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Eugeniy Paltsev 提交于
"Global data" structure "gd" is not used in init_helpers.c thus DECLARE_GLOBAL_DATA_PTR might be safely removed. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Eugeniy Paltsev 提交于
Update ARC architecture maintainers and add uboot-snps-arc@synopsys.com mailing list. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Eugeniy Paltsev 提交于
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Eugeniy Paltsev 提交于
CPU on HSDK board runs at 500MHz after preloader so fix wrong CPU frequency value in hsdk_defconfig. Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 17 4月, 2018 9 次提交
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由 Tom Rini 提交于
Rsync all defconfig files using moveconfig.py Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Dinh Nguyen 提交于
None of the SoCFPGA platforms will support EFI/ISO partition types that is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2 partition type. This is needed to help limit the size of the SPL to within the 64k limit that is required for SoCFPGA. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Add the DM reset driver to socfpga defconfigs. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Add code to look for a reset manager property. Specifically, look for the reset-names of 'i2c'. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Add reset dts property to the i2c nodes. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Add all the appropriate i2c alias in the base socfpga dtsi and enables the i2c node on the DE0 NANO board. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Enable DM I2C driver on SoCFPGA platforms. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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由 Dinh Nguyen 提交于
Add a DM compatible reset driver for the SoCFPGA platform. Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
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