ROC-RK3308-CC is a rk3308 based board designed by
Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi
on board.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add dts file for ROC-RK3308-CC from firefly.

Sync form linux rockchip for v5.5-armsoc/dts64:
"arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc"
(sha1: 4403e1237be3af0977aa23ef399e3496316317a0)
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Usage:

 (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
 (2) cat spl/u-boot-spl.bin >> idbloader.img
 (3) upgrade_tool wl 0x40 idbloader.img

Note:
  When use ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in(1)
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

A dm based dram driver for rk3308 u-boot
to get capacity.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add support for rk3308 evaluation board.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add dts for rk3308 evb, sync from the linux kernel
upstream list [0].

[0]https://patchwork.kernel.org/patch/11201555/Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add clk controller driver for RK3308 SOC.

This patch depends on Elaine's pll patch[0].

[0]http://patchwork.ozlabs.org/patch/1183718/Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.
Signed-off-by: NElaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Add vdd_log node according to rock960 schematic V13.
This patch affect two boards:
- Rock960 Model A
- Ficus
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The u-boot specific device tree directives should be in u-boot.dtsi
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
(Fix with missing pmugrf)
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so
without the leading CONFIG_. The clock drivers all wrongly check for
CONFIG_RESET_ROCKCHIP, fix that
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

rockchip_reset_bind() already does the needed init for the reset
registers, only referenced the wrong cru structure.

So we can get rid of the open-coded reset init and just fix
the correct cru reference.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage
scaling. So the regulator reset voltage of 0.9V is used on this board.
Let u-boot initialize the center voltage to 0.95V as it is done for the
VD_LOGIC domain. This avoids instability and occasional linux kernel
Opses on this board.
Signed-off-by: NSoeren Moch <smoch@web.de>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
Signed-off-by: NSoeren Moch <smoch@web.de>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Enable TPL for rock960 like other rk3399 boards.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

roc-rk3399-pc_defconfig is committed in below

commit <8a681f4c> ("rockchip: rk3399:
Add ROC-RK3399-PC support")

which doesn't follow the existing defconfigs on rk3399.

So, rename as followed with other rk3399 defconfigs.

Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Few important regulator power rails fixes are available in
linux-next, so sync them same.

Here is the last commit details:
commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts:
rockchip: Fix roc-rk3399-pc regulator input rails")

Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

RK3288 needs to init the otg_data in board level to make the phy driver
work.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Migrate to use ofnode_* instead of fdt_* so that we may able to use live
dt for usb udc driver.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add px30 related devicetrees synced from the Linux kernel.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.
Signed-off-by: NFinley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add the table entry for px30 socs.
The px30 has 10K of sram available.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

The px30 contains 2 separate clock controllers, pmucru and cru.
Add drivers for them.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add the necessary glue code to allow pinctrl setting on px30 socs.
Signed-off-by: NDavid Wu <david.wu@rock-chips.com>
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Add headers needed by the upcoming px30 support, including two
new dt-binding headers taken from the Linux kernel.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.

Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals check for both. The default is set to "y if SPL_FRAMEWORK"
to mimic the previous behaviour where the TPL would always get the
SPL framework if it was enabled in SPL.
Signed-off-by: NHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: NKever Yang <kever.yang@rock-chips.com>

There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN
Signed-off-by: NYouMin Chen <cym@rock-chips.com>
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

Update the calculation of the stride to support all the DRAM case.
Signed-off-by: NYouMin Chen <cym@rock-chips.com>
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>

The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.
Signed-off-by: NYouMin Chen <cym@rock-chips.com>
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>