- 10 4月, 2010 5 次提交
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由 Andre Schwarz 提交于
Signed-off-by: NAndre Schwarz <andre.schwarz@matrix-vision.de>
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由 Frans Meulenbroeks 提交于
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com> Acked-by: NDetlev Zundel <dzu@denx.de>
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由 Albin Tonnerre 提交于
Signed-off-by: NAlbin Tonnerre <albin.tonnerre@free-electrons.com>
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- 09 4月, 2010 7 次提交
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由 Peter Tyser 提交于
gcc 3.4.6 previously reported the following error on many MIPS boards which utilize UBI: cmd_ubi.c:193: warning: 'vol' might be used uninitialized in this function The current code is structured such that 'vol' will never be used when it is NULL anyway, but gcc isn't smart enough to figure this out. Signed-off-by: NPeter Tyser <ptyser@xes-inc.com> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Kim B. Heino 提交于
While debugging one ill behaving USB device I found two bugs in USB storage probe. usb_stor_get_info() returns -1 (error), 0 (skip) or 1 (ok). First part of this patch fixes error case. Second part fixes usb_inquiry()'s retry counter handling. Original code had retry = -1 on error case, not retry = 0 as checked in the next line. Signed-off-by: NKim B. Heino <Kim.Heino@bluegiga.com>
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由 Kim B. Heino 提交于
Here's another USB storage patch. Currently U-Boot handles storage devices #0 - #4 as valid devices, even if there is none connected. This patch fixes usb_stor_get_dev() to check detected device count instead of MAX-define. This is very important for ill behaving devices. usb_dev_desc[] can be partially initialized if device probe fails. After fixing get_dev() it was easy to fix "usb part" etc commands. Previously it outputed "Unknown partition table" five times, now it's "no USB devices available". Signed-off-by: NKim B. Heino <Kim.Heino@bluegiga.com>
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由 Sergei Shtylyov 提交于
Add NEC EHCI controller to the list of the supported devices. Signed-off-by: NSergei Shtylyov <sshtylyov@mvista.com> drivers/usb/host/ehci-pci.c | 1 + 1 file changed, 1 insertion(+)
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由 Sergei Shtylyov 提交于
Commit b416191a (Fix EHCI port reset.) didn't move the code that checked for successful clearing of the port reset bit from ehci_submit_root(), relying on wait_ms() call instead. The mentioned code also erroneously reported port reset state when the reset was already completed. Signed-off-by: NSergei Shtylyov <sshtylyov@mvista.com>
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由 Sergei Shtylyov 提交于
USB devices on the 2nd port are not detected and I get the following message: The request port(1) is not configured That's with default CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS value of 2. 'req->index' is 1-based, so the comparison in ehci_submit_root() can't be correct. Signed-off-by: NSergei Shtylyov <sshtylyov@mvista.com>
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由 Sergei Shtylyov 提交于
On little endian machines, EHCI root hub's USB revision is reported as 0.2 -- cpu_to_le16() was missed in the initializer for the 'bcdUSB' descriptor field. The same should be done for the 'bcdDevice' field. Signed-off-by: NSergei Shtylyov <sshtylyov@mvista.com>
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- 08 4月, 2010 8 次提交
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由 Anatolij Gustschin 提交于
Fixes this warning: ati_radeon_fb.c: In function 'radeon_probe': ati_radeon_fb.c:598: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'void *' Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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由 Ed Swarthout 提交于
Use pci_bus_to_virt() to convert the bus address from the BARs to virtual address' to eliminate the direct mapping requirement. Rename variables to better match usage (_phys -> _bus or no-suffix) This fixes the mpc8572ds CONFIG_PHYS_64BIT mode failure: "videoboot: Video ROM failed to map!" Tested on mpc8572ds with and without CONFIG_PHYS_64BIT. Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com>
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由 Ed Swarthout 提交于
Console was being switched to video even if emulator fails and causing this hang: Scanning PCI bus 04 04 00 1095 3132 0104 00 PCIE3 on bus 03 - 04 Video: ATI Radeon video card (1002, 5b60) found @(2:0:0) videoboot: Booting PCI video card bus 2, function 0, device 0 videoboot: Video ROM failed to map! 640x480x8 31kHz 59Hz radeonfb: FIFO Timeout ! Signed-off-by: NEd Swarthout <Ed.Swarthout@freescale.com> Tested-by: NAnatolij Gustschin <agust@denx.de>
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由 Anatolij Gustschin 提交于
Allow displaying 8-bit RLE BMP images. Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 07 4月, 2010 14 次提交
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由 Thomas Chou 提交于
This patch adds reset_timer() before the flash status check waiting loop. Since the timer is basically running asynchronous to the cfi code, it is possible to call get_timer(0), then only a few _SYSCLK_ cycles later an interrupt is generated. This causes timeout even though much less time has elapsed. So the timer period registers should be reset before get_timer(0) is called. There is similar usage in nand_base.c. Signed-off-by: NThomas Chou <thomas@wytron.com.tw> Signed-off-by: NStefan Roese <sr@denx.de>
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由 Kumar Gala 提交于
The MPC8536DS_NAND SPL build was failing due to code size increase introduced by commit: commit 33f57bd5 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Mar 26 15:14:43 2010 -0500 85xx: Fix enabling of L1 cache parity on secondary cores We built in some NS16550 functions that we dont need and can get rid of them via CONFIG_NS16550_MIN_FUNCTIONS. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
The Freescale P2020DS board uses a new type of PIXIS FPGA, called the ngPIXIS. The ngPIXIS has one distinct new feature: the values of the on-board switches can be selectively overridden with shadow registers. This feature is used to boot from a different NOR flash bank, instead of having a register dedicated for this purpose. Because the ngPIXIS is so different from the previous PIXIS, a new file is introduced: ngpixis.c. Also update the P2020DS checkboard() function to use the new macros defined in the header file. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Timur Tabi 提交于
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx boards. This makes the code easier to read and more flexible. Delete pixis.h, because none of the exported functions were actually being used by any other file. Make all of the functions in pixis.c 'static'. Remove "#include pixis.h" from every file that has it. Remove some unnecessary #includes. Make 'pixis_base' into a macro, so that we don't need to define it in every function. Add "while(1);" loops at the end of functions that reset the board, so that execution doesn't continue while the reset is in progress. Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where appropriate. Replace ulong/uint with their spelled-out equivalents. Remove unnecessary typecasts, changing the types of some variables if necessary. Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make it easier for specific boards to support variations in the PIXIS registers sets. No current boards appears to need this feature. Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD. Apparently, "pixis_reset altbank" has never worked on this board. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Sandeep Gopalpet 提交于
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize the performance of mbar/eieio instructions. Signed-off-by: NSandeep Gopalpet <sandeep.kumar@freescale.com>
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由 Kumar Gala 提交于
There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NSrikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
If the PCI controller wasn't configured or enabled delete from the device tree (include its alias). For the case that we didn't even configure u-boot with knowledge of the controller we can use the fact that the pci_controller pointer is NULL to delete the node in the device tree. We determine that a controller was not setup (because of HW config) based on the fact that cfg_addr wasn't setup. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Add a helper function that given an alias will delete both the node the alias points to and the alias itself Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Acked-by: NGerald Van Baren <vanbaren@cideas.com>
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Dave Liu 提交于
For 64B cacheline SoC, set the fixed 8-beat burst len, for 32B cacheline SoC, set the On-The-Fly as default. Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Dave Liu 提交于
Read-to-read/Write-to-write turnaround for same chip select of DDR3 memory, BL/2+2 cycles is enough for them at BC4 and OTF case, BL/2 cycles is enough for fixed BL8. Cutting down the turnaround from BL/2+4 to BL/2+2 or BL/2 will improve the memory performance. Signed-off-by: NDave Liu <daveliu@freescale.com>
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由 Roy Zang 提交于
When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jerry Huang 提交于
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Acked-by: NStefano Babic <sbabic@denx.de>
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- 06 4月, 2010 1 次提交
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由 Stefan Roese 提交于
This patch moves the PPC4xx specific I2C device driver into the I2C drivers directory. All 4xx config headers are updated to include this driver. Signed-off-by: NStefan Roese <sr@denx.de>
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- 05 4月, 2010 1 次提交
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由 Detlev Zundel 提交于
pci_eth_init() is already conditional to CONFIG_PCI so not every caller needs to have conditionals. This is the only place in the current code base where such a check is still at the calling site. Signed-off-by: NDetlev Zundel <dzu@denx.de> CC: Ben Warren <biggerbadderben@gmail.com> CC: Peter Pearse <peter.pearse@arm.com>
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- 04 4月, 2010 4 次提交
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由 Matthias Fuchs 提交于
This patch is part of migrating the AT91 support towards using C struct for all SOC access. It removes one more CONFIG_AT91_LEGACY warning. at91_pmc.h needs cleanup after migration of the drivers has been done. Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd.eu>
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由 Asen Dimov 提交于
Signed-off-by: NAsen Dimov <dimov@ronetix.at>
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由 Alessandro Rubini 提交于
Previous code was failing when reading back the timer less than 400us after resetting it. This lead nand operations to incorrectly timeout any now and then. Moreover, writing the load register isn't immediately reflected in the value register. We must wait for a clock edge, so read_timer now waits for the value to change at least once, otherwise nand operation would timeout anyways (though less frequently). Signed-off-by: NAlessandro Rubini <rubini@unipv.it> Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
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由 Achim Ehrlich 提交于
This converts the at91 watchdog driver to new c structure type to access registers of the SoC Signed-off-by: NAchim Ehrlich <aehrlich@taskit.de>
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