1. 20 6月, 2020 2 次提交
  2. 19 6月, 2020 11 次提交
  3. 18 6月, 2020 3 次提交
  4. 16 6月, 2020 5 次提交
  5. 15 6月, 2020 17 次提交
  6. 14 6月, 2020 2 次提交
    • L
      arm: dts: socfpga: cyclone5: Update i2c-scl-falling-time-ns · a0bda1dd
      Ley Foon Tan 提交于
      Commit e71b6f66 ("i2c: designware_i2c: Rewrite timing calculation")
      change the hcnt and lcnt timing calculation. New timing calculation is
      based on calculation from Designware i2c databook.
      
      After this new timing calculation, hcnt will have negative value
      with i2c-scl-falling-time-ns 5000 that set in socfpga_cyclone5_socdk.dts.
      
      This patch overwrite i2c-scl-falling-time-ns to 300ns (default SCL fall
      time used in Designware i2c driver) for Uboot.
      
      Before the fix:
      => i2c dev 0
      Setting bus to 0
      Failure changing bus number (-22)
      
      After the fix:
      => i2c dev 0
      Setting bus to 0
      => i2c probe
      Valid chip addresses: 17 51 55 5B 5C 5E 66 68 70
      Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com>
      a0bda1dd
    • H
      eth/r8152: update the firmware · 65f7551b
      Hayes Wang 提交于
      Update the firmware to improve compatibility for none-intel USB
      host controller. The more information is as following.
      
      The device has auto-installed driver feature - via switch CD-ROM/NIC
      mode. But in some corner cases, it would switch to CD-ROM unexpected.
      This issue results in Lan Function Disabled.
      
      While USB PHY transits to P3 from P0 due to the absent of transmitter
      control, it would issues undefined signal to its link partner.
      Some Down Stream Port misidentify the undefined signal as wakeup
      signal. So the link state will not keep in suspend even the system
      is idle.
      Signed-off-by: NHayes Wang <hayeswang@realtek.com>
      65f7551b