- 20 1月, 2016 7 次提交
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由 Sergey Temerkhanov 提交于
This commit adds the FDT for the ThunderX family of SoCs Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sergey Temerkhanov 提交于
This commit adds the psci.h header file from Linux kernel which contains definitions related to the PSCI interface provided by firmware Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com>
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由 Sergey Temerkhanov 提交于
This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF) The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NCorey Minyard <cminyard@mvista.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com>
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由 Sergey Temerkhanov 提交于
This patch adds code which sets up 2-level page tables on ARM64 thus extending available VA space. CPUs implementing 64k translation granule are able to use direct PA-VA mapping of the whole 48 bit address space. It also adds the ability to reset the SCTRL register at the very beginning of execution to avoid interference from stale mappings set up by early firmware/loaders/etc. Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com>
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由 Sergey Temerkhanov 提交于
This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Sergey Temerkhanov 提交于
This patch adds Kconfig entries to facilitate usage of pl01x as a debug UART. Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Sergey Temerkhanov 提交于
This patch adds an ability to use pl01x as a debug UART. It must be configured like other types of debug UARTs Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Update for _debug_uart_init change] Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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- 19 1月, 2016 11 次提交
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由 Bin Meng 提交于
With driver model timer conversion, quark based board does not boot any more as mdelay() is called during quark_pcie_early_init() which is before driver model gets initialized. Fix this breakage. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tom Rini 提交于
With gcc-5.3 we get a warning for using switch() on a bool type. Rewrite these sections as if/else and update the one section that was using 1/0 instead of true/false. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
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由 Tom Rini 提交于
We need to use %lx not %x to describe a fdt_addr_t Cc: Simon Glass <sjg@chromium.org> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
With gcc-5.x we get: drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios': drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in this function [-Wmaybe-uninitialized] While unconvinced that this can happen in practice (if we malloc we set alloced to true, it will be false otherwise), silence the compiler. Signed-off-by: NTom Rini <trini@konsulko.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tom Rini 提交于
In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
A general best practice for SPDX is that Makefiles should have an identifier, add these as everything else is currently covered. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Only when we have CONFIG_CMD_UNZIP enabled do we have the 'gzwrite' command. While this command should be separated from CONFIG_CMD_UNZIP we should also only include the write portion of the gz code in that case as well. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Both of these boards are very close to their limit and with some toolchains such as gcc 5.x are too large. Switch to tiny printf to reclaim some size. Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
Enabling this function always removes some class of string saftey issues. The size change here in general is about 400 bytes and this seems a reasonable trade-off. Cc: Peng Fan <peng.fan@nxp.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Masahiro Yamada 提交于
Currently, this function returns wrong size if "bootm_low" is defined, but "bootm_size" is not. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 17 1月, 2016 18 次提交
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由 Daniel Schwierzeck 提交于
Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Update definitions for processor, registers as well as assemby macros. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
pci_virt_to_mem() uses virt_to_phys() to get the physical address. But pci_virt_to_mem() is also called with uncached addresses which is wrong according to the documentation of virt_to_phys(). Refactor the PCI_TO_MEM() macro to optionally map an uncached address back to a cached one before calling pci_virt_to_mem(). Currently pcnet works because virt_to_phys() is incorrectly implemented on MIPS. With the upcoming asm header file update for MIPS, the virt_to_phys() implementation will be fixed. Thus this patch is needed to keep pcnet working on MIPS Malta board. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Use void pointers as address argument for readl( and writel()). This is required for the upcoming MIPS asm header file and I/O accessor update. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Use void pointer as address argument for readl(). This is required for the upcoming MIPS asm header file and I/O accessor update. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
config.h is used in target and host code and therefore should not pull in target header files to avoid compile errors. This change is also required for the MIPS header file sync done in follow-up patches. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: NWills Wang <wills.wang@live.com> Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Refactor machine setup like it is done on ARM. While on it, also support "include <mach/file.h" for machine specific header files. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Prepare sub-folder for device-tree files. Make support for device-tree on MIPS available in Kbuild/Kconfig. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com>
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由 Daniel Schwierzeck 提交于
SPL binaries are usually linked to a fixed address in SRAM. Furthermore SPL binaries do not need to relocate itself. Thus do not build them as position-independent binaries which helps to largely reduce the size of SPL binaries. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Put all functions coded in assembly in sub-sections of section .text. This allows the linker to garbage collect unused assembly functions too. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Daniel Schwierzeck 提交于
Correctly annotate _start and relocate_code as functions to produce more readable disassembly code generated by objdump. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Purna Chandra Mandal 提交于
With CONFIG_CMD_GPIO compilation reports error. common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: NChin Liang See <clsee@altera.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 16 1月, 2016 4 次提交
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由 Dalon Westergreen 提交于
socfpga: Modify qts-filter args to allow input for bsp generated files and quartus project directories The hps_isw_handoff and bsp/generated folders are typically not in the same path.This patch adds support for specifying the different input directories for the bsp and quartus projects. Signed-off-by: NDalon Westergreen <dwesterg@gmail.com> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NChin Liang See <clsee@altera.com>
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由 Dinh Nguyen 提交于
We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS. Signed-off-by: NDinh Nguyen <dinguyen@opensource.altera.com>
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由 Marek Vasut 提交于
Init the rule ID, otherwise the debug code will always dump the protection settings entry 0. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com>
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