- 26 7月, 2021 1 次提交
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由 Manish Narani 提交于
Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This PHY initialization should be handled from Xilinx USB core as the prerequisite register configurations are done here only. Signed-off-by: NManish Narani <manish.narani@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 23 6月, 2021 5 次提交
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由 Michal Simek 提交于
It is not recommended to have aliases for gpio. In past it was used in Linux for assigning numbers via sysfs which is deprecated and libgpiod should be used instead. In U-Boot this number is used for seq number but gpio offset are not counted from this number. That's why having these aliases only for seq number is not needed. As is done in Linux it is the best to use full gpio name instead of sequence number which depends on sequence in binding. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
psgtr node should be below pinctrl for easier comparion among dts files. That's why move that nodes to different location. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There are no drivers for these devices that's why remove that nodes completely. This change is done based on Linux kernel. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
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由 Michal Simek 提交于
Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.comSigned-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Trivial change for all files I have touched recently. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 19 5月, 2021 2 次提交
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由 Michal Simek 提交于
Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 30 3月, 2021 1 次提交
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由 Michal Simek 提交于
There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 20 8月, 2020 1 次提交
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由 Michal Simek 提交于
s/xlnx,mio_bank/xlnx,mio-bank/g DT binding is describing mio-bank not mio_bank that's why fix all DTSes and also driver itself. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NPeng Fan <peng.fan@nxp.com>
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- 27 4月, 2020 1 次提交
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由 Michal Simek 提交于
- Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 06 4月, 2020 2 次提交
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由 Michal Simek 提交于
Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Trivial change. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 24 10月, 2019 3 次提交
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由 Harini Katakam 提交于
The DP83867 strap control workaround is already present in Linux kernel mainline binding. All these Xilinx boards require this quirk. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Enable fpd_dma for these boards. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Ethernet phys based on devicetree specification should be using ethernet-phy@ node name instead of pure phy@. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 12 4月, 2019 1 次提交
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由 Neil Armstrong 提交于
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot dts files. This compatible has been added in sf_probe, let use it. This patch switches to jedec,spi-nor when spi-flash is used in the DTS and DTSI files, and removed spi-flash when jedec,spi-nor is already present. The x86 dts are switched in a separate commit since it depends on a change in fdtdec. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NStefan Roese <sr@denx.de> Reviewed-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: NEvgeniy Paltsev <paltsev@synopsys.com> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NPatrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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- 29 11月, 2018 1 次提交
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由 Michal Simek 提交于
Enable reading tx and rx buswidth from DT via spi-uclass. To get these from uclass spi-flash compatible string has to be added to flash node. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 31 5月, 2018 1 次提交
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由 Michal Simek 提交于
I2c address is not 0x21 but 0x20. This patch is fixing both revA and revC boards. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 09 4月, 2018 1 次提交
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由 Michal Simek 提交于
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with some differences. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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