Enable a common set of partition types, filesystems, and related
commands in tegra-common.h, so that they are available on all Tegra
boards. This allows boot.scr (loaded and executed by the default
built-in environment) on those boards to assume that certain features
are always available.

Do this in tegra-common.h, so that individual board files can undefine
the features if they really don't want any of them.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to
tegra-common.h to ensure it's always set.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This wasn't used anywhere in any Tegra build.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

include/configs/tegra-common.h now holds common config options
for Tegra SoCs.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>

Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In
some cases (e.g. user load commands) this cannot be guaranteed by callers
of the MMC APIs. To solve this, modify the Tegra MMC driver to use the
new bounce_buffer_*() APIs.

Note: Ideally, all U-Boot code will always provide address- and size-
aligned buffers, so a bounce buffer will only ever be needed for user-
supplied buffers (e.g. load commands). Ensuring this removes the need
for performance-sucking bounce buffer cache management and memcpy()s.
The one known exception at present is the SCR buffer in sd_change_freq(),
which is only 8 bytes long. Solving this requires enhancing struct
mmc_data to know the difference between buffer size and transferred data
size, or forcing all callers of mmc_send_cmd() to have allocated buffers
using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not
enforced in any way at present, and so cannot be assumed by the core MMC
code.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Move environment settings for stdin/stdout/stderr to
tegra-common-post.h and generate them automaticaly based on input
device selection.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>

CONFIG_EHCI_DCACHE was removed by commit b8adb120
"USB: Drop cache flush bloat in EHCI-HCD". Remove the defines from
the boards configs as well.
Signed-off-by: NJeroen Hofstee <jeroen@myspectrum.nl>
cc: Marek Vasut <marex@denx.de>
cc: Stefan Roese <sr@denx.de>
cc: Tom Rini <trini@ti.com>
cc: Wolfgang Denk <wd@denx.de>
cc: Thierry Reding <thierry.reding@avionic-design.de>
cc: Tom Warren <twarren@nvidia.com>
cc: Stephen Warren <swarren@nvidia.com>
cc: Stefano Babic <sbabic@denx.de>

For tegra we want to enable the cache for the LCD. This is easier if
we can avoid using L2 page tages, so align the LCD to a section
boundary.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Change tegra SPL to use common SPL framework.  Any tegra specific
initialization is now done in spl_board_init() instead of
board_init_f()/board_init_r().  Only one SPL boot target is supported
on tegra, which is boot to RAM image.  jump_to_image_no_args() must be
overridden on tegra so the host CPU can be initialized.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NLucas Stach <dev@lynxeye.de>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

For Tegra, the SPL and main U-Boot are concatenated together to form a
single memory image. Hence, the maximum SPL size is the different in
TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
the calculation automatically.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Acked-by: NAllen Martin <amartin@nvidia.com>
Tested-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add the missing bits to the Tegra NAND driver to make ONFI detection work
properly.

Also add it to the Tegra default config, as it seems to be a reasonable thing
to have it available on all boards that use any kind of NAND.
Signed-off-by: NLucas Stach <dev@lynxeye.de>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This define indicates the size of the memory region where it is safe
to place data passed to the Linux kernel (ATAGs, DTB, initrd). The
value needs to be:

a) Less than or equal to RAM size.
b) Small enough that the area is not within the kernel's highmem region,
   since the kernel cannot access ATAGs/DTB/initrd from highmem.
c) Large enough to hold the kernel+DTB+initrd.

256M seems large enough for (c) in most circumstances, and small enough
to satisfy (a) and (b) across any possible Tegra board. Note that the
user can override this value via environment variable "bootm_mapsize"
if needed.

The advantage of defining BOOTMAPSZ is that we no longer need to define
variable fdt_high in the default environment. Previously, we defined
this to prevent the DTB from being relocated to the very end of RAM,
which on most Tegra systems is within highmem, and hence which would
cause boot failures. A user can still define this variable themselves
if they want the FDT to be either left in-place wherever loaded, or
copied to some other specific location. Similarly, there should no
longer be a strict requirement for the user to define initrd_high if
using an initrd.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This is extremely likely to be used from the boot.scr that Tegra's default
bootcmd locates and executes.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: NTom Warren <twarren@nvidia.com>

Fix up the rest of implementations of __stringify().
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: NTom Warren <twarren@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>

This enables NAND support for the Seaboard.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

CONFIG_STACKSIZE is not referenced anywhere except on AVR32, but present
in most ARM board config files.

IRQs are only enabled for 1 config, so remove the unused config options
for IRQ and FIQ stack size as well.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>

Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards.  Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA.
The meaning of the config options is now:

CONFIG_TEGRA - Any tegra chip
CONFIG_TEGRA20 - A tegra20 family chip
CONFIG_TEGRA30 - A tegra30 family chip (not added yet)
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.
Signed-off-by: NAllen Martin <amartin@nvidia.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

bootz is just like bootm, except that it can boot a raw zImage, without
requiring it to be wrapped inside a uImage.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Tegra's boot ROM supports a mode whereby code may be downloaded and flash
programmed over a USB connection. On dev boards, this is typically entered
by holding down a "force recovery" button and resetting the CPU. However,
not all boards have such a button (one example is the Compulab Trimslice),
so a method to enter RCM from software is useful.

This change implements the command "enterrcm" to do this, and enables it
for all Tegra boards by default. Even on boards other than Trimslice,
controlling this over a UART may be useful, e.g. to allow simple remote
control without the need for mechanical button actuators, or hooking up
relays/... to the button.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

So that all Tegra boards define environment variables that describe
themselves.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.
Signed-off-by: NTom Warren <twarren@nvidia.com>

This implements a useful bootcmd for Tegra. The boot order is:

* If USB enabled, USB storage
* Internal MMC (SD card or eMMC)
* If networking is enabled, BOOTP/TFTP

When booting from USB or MMC, the boot script is assumed to be in
partition 1 (although this may be overridden via the rootpart variable),
both ext2 and FAT filesystems are supported, the boot script may exist
in either / or /boot, and the boot script may be named boot.scr.uimg or
boot.scr.

When booting over the network, it is assumed that boot.scr.uimg exists
on the TFTP server. There is less flexibility here since those setting
up network booting are expected to need less hand-holding.

In all cases, it is expected that the initial file loaded is a U-Boot
image containing a script that will load the kernel, load any required
initrd, load any required DTB, and finally bootm the kernel.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

console isn't used by anything, and the kernel should be set appropriately
by whatever script is booting the kernel, not imposed by the bootloader.

mem might be useful, but the current value is pretty bogus, since it
includes nvmem options that make no sense for an upstream kernel, and
equally should not be required for any downstream kernel. Either way, this
is also best left to the kernel boot script.

smpflag isn't used by anything, and again was probably intended to be a
kernel command-line option better set by the kernel boot script.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Exactly one board has defined CONFIG_SYS_PROMPT_HUSH_PS2 to a value
different than "> " which is vision2.  I have Cc'd the maintainer here
as I strongly suspect this is a bug rather than intentional behavior.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: NTom Rini <trini@ti.com>
Acked-by: NStefano Babic <sbabic@denx.de>

All tegra boards will use these options by default.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This enables LP0 to support suspend / resume on Seaboard.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The Tegra 2x SOC has four ports, so define TEGRA_I2C_NUM_CONTROLLERS
in the shared config file.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NTom Warren <twarren@nvidia.com>

All Tegra2 boards should include tegra2-common. This adds the required
USB config to that file.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

NVIDIA's flashing tools assume that the bootloader is loaded at address
0x00108000. Instead of requiring non-standard builds of those tools
which allow a load address of 0x00E08000, this commit just switches all
Tegra2 boards to use the standard load address.
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Tested-by: NSimon Glass <sjg@chromium.org>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This uses the SPI flash on Seaboard to store an 8KB environment.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

CONFIG_ENABLE_CORTEXA9 and CONFIG_SKIP_RELOCATE_UBOOT are not needed,
so remove them.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

We want to move away from a special Tegra2 start-up, and just use
arch_cpu_init() instead. However, if we run board_init_f() from boot
we need to build it for ARMv4T, since the Tegra's AVP start-up CPU
does not support ARMv7.

The effect of this is to do the AVP init earlier, and in
arch_cpu_init(), rather that board_early_init_f().
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Acked-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NAnton Staaf <robotboy@chromium.org>
Cc: Tom Warren <twarren.nvidia@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NTom Warren <twarren@nvidia.com>

Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF
Signed-off-by: NAneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message