提交 96d21237 编写于 作者: A Anton staaf 提交者: Wolfgang Denk

tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra

Signed-off-by: NAnton Staaf <robotboy@chromium.org>
Cc: Tom Warren <twarren.nvidia@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: NMike Frysinger <vapier@gentoo.org>
上级 46a6d51c
......@@ -33,6 +33,8 @@
#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
#include <asm/arch/tegra2.h> /* get chip and board defs */
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册