Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: York Sun <yorksun@freescale.com>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

The default boot command searches for dofastboot varaiable
and does a fastboot if it is set to 1.
But the condition "if test ${dofastboot} -eq 1" always
returns true if dofastboot is not defined and breaking mmc boot.
So make dofastboot as 0 by default and let the runtime
environment set it if fastboot is required.
Reported-by: NYan Liu <yan-liu@ti.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Remove FAT function prototypes from the cm5200 firmware update code, and
include the relevant headers instead.

This exposes the fact that the custom prototyoe for do_fat_read() in
this file was incorrect. Rather than simply fixing the call-site, replace
do_fat_read() with fat_exists(). This removes the only use of
do_fat_read() outside of the FAT code.
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>

Add support for 4 1.62G lane eDP panels connected via an anx9804 bridge,
such as found on the Colombus devkit.

While at it also fix the wrong indentation of the SSD2828 Kconfig help text
in board/sunxi/Kconfig.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add support for the ANX9804 bridge chip, which can take pixel data coming
from a parallel LCD interface and translate it on the fly into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NAnatolij Gustschin <agust@denx.de>

Add support for using the mipi pll as lcd clock source, this is
necessary for getting higher dotclocks with lcd panels.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>
Acked-by: NAnatolij Gustschin <agust@denx.de>

Add support for the mipi pll, this is necessary for getting higher dotclocks
with lcd panels.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add a helper function to get the pll3 clock rate.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

sun6i and later have a couple of io-blocks which are shared between the
main CPU core and the "R" cpu which is small embedded cpu which can be
active while the main system is suspended.

These gpio banks sit at a different mmio address then the normal banks,
and have a separate devicetree node and compatible, this adds support for
these banks to the sunxi-gpio code when built with device-model support.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The phy is using a RGMII interface, which we need to specify in our
board-config, and the dts needs a gmac section (the dts changes have
also been submitted to the kernel).
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The sun5i die has a hdmi encoder onboard, but the A13 package does not
route this to the outside, disable hdmi support on A13 based boards.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Enable composite video support on all boards which have a composite video
out connector (either cinch or jack).
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The Auxtek-T003 HDMI stick is an A10s based HDMI stick with USB wifi,
and composite video out support.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Sync the sunxi dts files with the changes queued up for kernel-4.3 in
mripard's sunxi/dt-for-4.3 branch.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

The tv-encoder on sun5i is slightly different compared to the one on
sun4i/sun7i.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>

Add support for making the visual area of the framebuffer smaller and
drawing a black border around it. This is intended for use with
overscanning monitors (esp. with composite video out), to avoid part
of the picture being invisible.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NIan Campbell <ijc@hellion.org.uk>
Acked-by: NAnatolij Gustschin <agust@denx.de>

cfbconsole currently assumes that the width and stride of the framebuffer
are the same, in most places where stride matters it uses a VIDEO_LINE_LEN
helper macro.

This commit changes the few places not using VIDEO_LINE_LEN to also use
VIDEO_LINE_LEN, and protects the default VIDEO_LINE_LEN with a #ifndef
guard, allowing the boards config.h to override and, and thus support
cases where stride != width.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NAnatolij Gustschin <agust@denx.de>

The passed in width is always VIDEO_COLS. This is a preparation patch
for adding stride != width support to the cfbconsole code.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NAnatolij Gustschin <agust@denx.de>

Represent all available RAM in either one or two banks. The first bank
describes any RAM below 4GB. The second bank describes any RAM above 4GB.

This split is driven by the following requirements:
- The NVIDIA L4T kernel requires separate entries in the DT /memory/reg
  property for memory below and above the 4GB boundary. The layout of that
  DT property is directly driven by the entries in the U-Boot bank array.
- On systems with RAM beyond a physical address of 4GB, the potential
  existence of a carve-out at the end of RAM below 4GB can only be
  represented using multiple banks, since usable RAM is not contiguous.

While making this change, add a lot more comments re: how and why RAM is
represented in banks, and implement a few more "semantic" functions that
define (and perhaps later detect at run-time) the size of any carve-out.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The return value of query_sdram_size() is assigned directly to
gd->ram_size in dram_init(). Adjust the return type to match the field
it's assigned to. This has the beneficial effect that on 64-bit systems,
the return value can correctly represent large RAM sizes over 4GB.

For similar reasons, change the type of variable size_bytes in the same
way.

query_sdram_size() would previously clip the detected RAM size to at most
just under 4GB in all cases, since on 32-bit systems, larger values could
not be represented. Disable this feature on 64-bit systems since the
representation restriction does not exist.

On 64-bit systems, never call get_ram_size() to validate the detected/
calculated RAM size. On any system with a secure OS/... carve-out, RAM
may not have a single contiguous usable area, and this can confuse
get_ram_size(). Ideally, we'd make this call conditional upon some other
flag that indicates specifically that a carve-out is actually in use. At
present, building for a 64-bit system is the best indication we have of
this fact. In fact, the call to get_ram_size() is not useful by the time
U-Boot runs on any system, since U-Boot (and potentially much other early
boot software) always runs from RAM on Tegra, so any mistakes in memory
controller register programming will already have manifested themselves
and prevented U-Boot from running to this point. In the future, we may
simply delete the call to get_ram_size() in all cases.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The new value is the most likely value where the kernel wants to end up
at run-time. Selecting this value as the load address likely avoids the
need to copy the kernel image from the actual load address to the desired
load address. Note that this isn't guaranteed since the kernel may wish
to run at an arbitrary location. In that case, U-Boot will still relocate
the image according to its wishes; this change is a performance
optimization, not a hard-coding of the final image location.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The logic for simple PLLs on T124 was broken by this commit:

  722e000c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.

Correct it by reading from the same pll_misc register that it writes to and
adding an entry for the DP PLL in the pllinfo table.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

This header file uses type definitions (u8, u32) from linux/types.h but
doesn't include it. If includes aren't carefully ordered this can cause
build failures.

Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Disable subpage writes as we do not provide ecc->hwctl.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Unfortunately currently both Apalis T30 as well as Colibri T30 crash
upon starting USB host support. This is due to the following patch not
having taken into account that our T30 device trees were defaulting to
peripheral only mode instead of otg:

commit ddb9a502
dm: usb: tegra: Move most of init/uninit into a function

This patch fixes this by defaulting to otg now.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Make sure SODIMM pin 87 nRESET_OUT is released properly by explicitly
setting its pin mux function to GMI. This solves some issues with e.g.
USB not being fully operational on carrier boards with USB hubs
connected to reset if U-Boot got loaded via recovery mode aka rcm.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Various clean-ups either in comments, order or spacing without any
functional impact:
- Add some comments in the device trees resp. reorder some parameters
  for consistency across all our modules.
- Sort some include files alphabetically (while leaving common.h on
  top of course).
- Streamline some comments in the configuration files and fix the
  spacing from using spaces to tabs.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384.
This increases the tftp download speed considerably.

While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to
fifty '#' independent of the downloaded file size.
Signed-off-by: NMax Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Now as all is in place actually enable UBI/UBIFS support to be able to
boot the Linux kernel and root file system from NAND.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Enable mtdparts aka dynamic MTD partition support.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Integrate cache alignment bounce buffer to workaround issues as follows:

Loading file '/boot/zImage' to addr 0x01000000 with size 4499152 (0x0044a6d0)...
ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108
ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108
Done
Kernel image @ 0x1000000 [ 0x000000 - 0x44a6d0 ]

Starting kernel ...

undefined instruction
pc : [<005ff03c>]          lr : [<0000800c>]
sp : 0144b6e8  ip : 01000188     fp : 0144a6c8
r10: 00000000  r9 : 411fc090     r8 : 00000100
r7 : 00000cfb  r6 : 0144a6d0     r5 : 00000000  r4 : 00008000
r3 : 0000000c  r2 : 00000100     r1 : 00000cfb  r0 : 00000000
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Fix PIO read_byte() implementation not only used for the legacy READ ID
but also the PARAM command required for proper ONFI detection.

This fix is inspired by Lucas Stach's Linux Tegra NAND driver of late
(not mainline yet but getting there soon I hope).

I vaguely remember that those commands are special on 16-bit bus NAND
(e.g. always return 8-bit data regardless) and later Linux MTD fixed/
changed the way this is handled which in turn broke once U-Boot pulled
that in. Basically instead of doing PIO read regular DMA block read is
now used which this patch actually fixes.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The Colibri T20's PMIC enters a sleep mode on low supply voltage < 3.0V
±2.5% (2.92...3.08V). Rising the main supply voltage again does not
bring it back to regular operation. Not even a full reset does bring
the module back. A full power cycle was required to reboot the system.
A long positive pulse on the PMICs resume pin also reboots the system
but this pin is only accessible as a test point on the module.

This patch configures the PMIC through I2C to not enter this sleep mode
plus force it to normal state upon sleep request exit should this ever
happen.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>

Add I2C support in order to subsequently allow disabling the PMIC sleep
mode on low supply voltage.
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NTom Warren <twarren@nvidia.com>