- 08 4月, 2011 21 次提交
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由 Mike Frysinger 提交于
Some parts lack Bank B in L1 data, so have the linker script fall back to Bank A when that happens. This way we can still leverage L1 data. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
When bootstrapping ourselves on the fly at runtime (via "go"), we need to turn off the caches to avoid taking software exceptions. Since caches need CPLBs and CPLBs need exception handlers, but we're about to rewrite the code in memory where those exception handlers live, we need to turn off caches first. This new code also encourages a slight code optimization by storing the MMR bases in dedicated registers so we don't have to fully load up the pointer regs multiple times. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
If the part has no external memory configured, then there will be no os log for us to check, and any attempt to access that memory will trigger hardware errors. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Common code already takes care of setting up these defines when a port hasn't specified them, so punt the duplicate values. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The recent global data changes (making the size autogenerated) broke the board info handling on Blackfin ports as we were lying and lumping the bd_t size in with the gd_t size. So use the new dedicated bd_t size to setup its own address in memory. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Have CONFIG_ENV_ADDR be based on CONFIG_ENV_OFFSET rather than the other way around so that we can use CONFIG_ENV_OFFSET during build. It also avoids a little address duplication. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The __BFIN_DEF_ADSP_BF537_proc__ define isn't setup anymore, so use the one coming from the compiler. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Fixes a build error due to new partial linking logic. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Chong Huang 提交于
Signed-off-by: NChong Huang <chuang@ucrobotics.com> Signed-off-by: NHaitao Zhang <minipanda@linuxrobot.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Andreas Schallenberg 提交于
Info about the hardware can be found here: http://www.dilnetpc.com/dnp0086.htmSigned-off-by: NAndreas Schallenberg <Andreas.Schallenberg@3alitydigital.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Looks like the filesystem shuffling missed the SDP board. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
This is a revert of 821ad16f as Wolfgang doesn't like the new code. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Unify this convention for all Blackfin boards. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
We don't want/use this value for Blackfin boards, so punt it and have the common code error out when people try to use it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Only the first run of boards had a ksz switch on it, so if building for a newer silicon rev or SPI is disabled, don't bother checking for the ksz. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 05 4月, 2011 5 次提交
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git://git.denx.de/u-boot-mpc85xx由 Wolfgang Denk 提交于
Conflicts: drivers/usb/host/ehci-pci.c Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Timur Tabi 提交于
Clean up the macro defintions used to enable DIU (video) support on the MPC8610HPCD and the MPC5121ADS so that they look more like the P1022DS, which is newer. Add software cursor support to all three boards. Also document the CONFIG_FSL_DIU_FB in the README. Signed-off-by: NTimur Tabi <timur@freescale.com> Acked-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jerry Huang 提交于
We implement our own mmc_get_env_addr since the environment variables are written to just after the u-boot image on SDCard, so we must read the MBR to get the start address and code length of the u-boot image, then calculate the address of the env. Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: NZhao Chenhui <b35336@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Mingkai Hu 提交于
On some boards the environment may not be located at a fixed address in the MMC/SDHC card. This allows those boards to implement their own means to report what address the environment is located at. Signed-off-by: NMingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: NZhao Chenhui <b35336@freescale.com> Acked-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 04 4月, 2011 14 次提交
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由 Kumar Gala 提交于
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kyle Moffett 提交于
The numeric constants in the switch statements are replaced by #defines added to the common ddr_spd.h header. This dramatically improves the readability of the switch statments. In addition, a few of the longer lines were cleaned up, and the DDR2 type for an SO-RDIMM module was added to the DDR2 switch statement. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kyle Moffett 提交于
The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit integer divide operations to convert between nanoseconds and DDR clock cycles given arbitrary DDR clock frequencies. Since all of the inputs to this are 32-bit (nanoseconds, clock cycles, and DDR frequencies), we can easily restructure the computation to use the "do_div()" function to perform 64-bit/32-bit divide operations. On 64-bit this change is basically a no-op, because do_div is implemented as a literal 64-bit divide operation and the instruction scheduling works out almost the same. On 32-bit PowerPC a fully accurate 64/64 divide (__udivdi3 in libgcc) is over 1.1kB of code and thousands of heavily dependent cycles to compute, all of which is linked from libgcc. Another 1.2kB of code comes in for the function __umoddi3. It should be noted that nothing else in U-Boot or the Linux kernel seems to require a full 64-bit divide on my 32-bit PowerPC. Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Acked-by: NYork Sun <yorksun@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Laurentiu TUDOR 提交于
We utilize the compatible string to find the node to add fsl,liodn property to. However P3041 & P5020 don't have "fsl,p4080-pcie" compatible for their PCIe controllers as they aren't backwards compatible. Allow the macro's to specify the PCIe compatible to use to allow SoC uniqueness. On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the PCIe controllers. Signed-off-by: NLaurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jiang Yutang 提交于
Signed-off-by: NJiang Yutang <b14898@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Li Yang 提交于
Signed-off-by: NLi Yang <leoli@freescale.com>
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由 bhaskar upadhaya 提交于
Fix up the device tree property associated with the IEEE 1588 timer source frequency. Currently we only support the IEEE 1588 timer source being the internal eTSEC system clock (for those SoCs with IEEE 1588 support). The eTSEC clock is ccb_clk/2. Signed-off-by: NBhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
On the P1023 the Fman freq is equivalent to the system bus freq, not 1/2 of it. Also we only have one Fman so no need for the code to deal with a second. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
On CoreNet based SoCs (P2040, P3041, P4080, P5020) we have some additional rules to determining the various frequencies that PME & FMan IP blocks run at. We need to take into account: * Reduced number of Core Complex PLL clusters * HWA_ASYNC_DIV (allows for /2 or /4 options) On P2040/P3041/P5020 we only have 2 Core Complex PLLs and in such SoCs the PME & FMan blocks utilize the second Core Complex PLL. On SoCs like p4080 with 4 Core Complex PLLs we utilize the third Core Complex PLL for PME & FMan blocks. On P2040/P3041/P5020 we have the added feature that we can divide the PLL down further by either /2 or /4 based on HWA_ASYNC_DIV. On P4080 this options doesn't exist, however HWA_ASYNC_DIV field in RCW should be set to 0 and this gets a backward compatiable /2 behavior. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Zhao Chenhui 提交于
MPC8572DS provides 2 USB ports with ULI1575. We enable USB storage device support using PCI EHCI module. Signed-off-by: NZhao Chenhui <b35336@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Zhao Chenhui 提交于
Signed-off-by: NZhao Chenhui <b35336@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Zhao Chenhui 提交于
Signed-off-by: NZhao Chenhui <b35336@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Poonam Aggrwal 提交于
Add support for 36-bit address map for NOR, SD, and SPI boot cfgs. Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NPriyanka Jain <priyanka.jain@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Poonam Aggrwal 提交于
Changed the following DDR timing parameters for 800Mt/s: tRRT BL/2+1 to BL/2 tWWT BL/2+1 to BL/2 tWRT BL/2+1 to BL/2 tRWT BL/2+1 to BL/2 REFINT 6500ns to 7800ns Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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