- 10 5月, 2017 1 次提交
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由 Wenyou Yang 提交于
Fix the DDR2 configuration to make SPL work. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
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- 14 4月, 2017 3 次提交
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由 Wenyou Yang 提交于
AT91 PIO controller is a combined gpio-controller, pin-mux and pin-config module. The peripheral's pins are assigned through per-pin based muxing logic. Each SoC will have to describe the its limitation and pin configuration via device tree. This will allow to do not need to touch the C code when adding new SoC if the IP version is supported. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
The intention of the removal is the preparation to introduce the new AT91 PIO pinctrl driver. Use the union to make the PIO3 and PIO2's registers be together and make their offset aligned. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
When the CONFIG_ATMEL_LEGACY is undefined, according to the following defines, at91_set_gpio_value() references to at91_set_pio_value(x, y) with two parameters. #define at91_set_gpio_value(x, y) at91_set_pio_value(x, y) #define at91_get_gpio_value(x) at91_get_pio_value(x) But there isn't the implementation of at91_set_pio_value(x, y) with two parameters in U-Boot. This is an error. Same as at91_get_gpio_value(x) define. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 29 10月, 2016 1 次提交
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由 Heiko Schocher 提交于
add missing MPDDRC_MD defines Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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- 24 9月, 2016 1 次提交
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由 Masahiro Yamada 提交于
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 16 8月, 2016 2 次提交
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由 Wenyou Yang 提交于
In order to make these PIO4 definitions shared with AT91 PIO4 pinctrl driver, move them from the existing gpio driver to the head file, and rephrase them. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Wenyou Yang 提交于
The patch is referred to at91 clock driver of Linux, to make the clock node descriptions in DT aligned with the Linux's. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 27 6月, 2016 1 次提交
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由 Heiko Schocher 提交于
add support for CONFIG_AT91SAM9M10G45. Signed-off-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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- 13 6月, 2016 4 次提交
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由 Marek Vasut 提交于
Add missing parenthesis around the variable into the macro. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com>
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由 Marek Vasut 提交于
Extend the boot device autodetection from SAMA5D2 only to the entire SAMA5Dx family of microcontrollers. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org> [minor compile fix for SAMA5D2] Signed-off-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Andre Renaud 提交于
Add register definitions for the AT91 RTC so that this can potentially be used in U-Boot. Signed-off-by: NAndre Renaud <andre@designa-electronics.com> Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Andre Renaud 提交于
This is available on AT91SAM9G45. Add the peripheral address and flag definitions. Signed-off-by: NAndre Renaud <andre@designa-electronics.com> Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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- 24 5月, 2016 3 次提交
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由 Marek Vasut 提交于
Implement support for saving ARM register R4 early during boot using save_boot_params . Implement support for decoding the stored register R4 value in spl_boot_device() to obtain boot device from which the SoC booted. This way, the SPL will always load U-Boot from the same device from which the SPL itself booted instead of using hard-coded boot device. This functionality is useful for example when booting sama5d2-xplained from SD card, where by default the SPL would try loading the U-Boot from eMMC and fail. This is because eMMC is on SDHCI0 (BOOT_DEVICE_MMC1), while SD slot is on SDHCI1 (BOOT_DEVICE_MMC2) and the SPL was hard-wired to always boot from BOOT_DEVICE_MMC1. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Wenyou Yang 提交于
Add the UPLL clock and master clock as a clock source for getting the generated clock frequency to complete its clock sources support. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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由 Wenyou Yang 提交于
They will be used on SAMA5D2 PTC board. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas@biessmann.org>
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- 19 2月, 2016 6 次提交
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由 Samuel Mescoff 提交于
The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory. Make sure it is configured as a L2 cache memory when booting from a SPL image. Based on the commit b5ea95ef2b5b from the at91bootstrap repository. Signed-off-by: NSamuel Mescoff <samuel.mescoff@mobile-devices.fr> Reviewed-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
To avoid the duplicated code, add the PMC_PLLICPR init function. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
To avoid the duplicated code, add the PLLB handle functions. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com> Tested-by: NHeiko Schocher <hs@denx.de> [add enable/disable functions to arm920t] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
To avoid the duplicated code, add the UTMI PLL handle functions, and add PMC_USB init function too. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
Remove unnecessary #ifdef CPU_HAS_PCR. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Tested-by: NHeiko Schocher <hs@denx.de> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 02 2月, 2016 3 次提交
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由 Wenyou Yang 提交于
The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
The DDR3-SDRAM initialization sequence is implemented in accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section described in the SAMA5D2 datasheet. Add registers and definitions of mpddrc controller, which is used to support DDR3 devices. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
Add struct atmel_mpddrc_config to accommodate the mpddrc register configurations, not using the mpddrc register map structure, struct atmel_mpddrc, in order to increase readability and reduce run-time memory use. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 01 12月, 2015 4 次提交
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由 Wenyou Yang 提交于
To make saic redirect code sharing with other SoCs, move the saic redirect code from SAMA5D4 particular file, mach-at91/armv7/sama5d4_devices.c to a separate file, mach-at91/atmel_sfr.c Move ATMEL_SFR_AICREDIR_KEY definition to sama5d4.h, because each SoC has its own value. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
To make matrix initialization code sharing with others, use the matrix slave id macros, instead of hard-coding. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
The PIO4 is introduced from SAMA5D2, as a new version for Atmel PIO controller. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
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- 03 11月, 2015 3 次提交
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由 Wenyou Yang 提交于
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 specification. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
Some peripherals may need a second clock source that may be different from the system clock. This second clock is the generated clock (GCK) and is managed by the PMC via PMC_PCR. For simplicity, the clock source of the GCK is fixed to PLLA_CLK. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Wenyou Yang 提交于
Provide the specific addresses for the Chip ID and Chip ID Extension registers, instead of the offset, which make it use on other chips. Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 21 8月, 2015 2 次提交
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由 Erik van Luijk 提交于
To enable the clocks on the at91 boards a constant (0x4) is used. This is replaced with a define in at91_pmc.h (1 << 2). Signed-off-by: NErik van Luijk <evanluijk@interact.nl> Reviewed-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Erik van Luijk 提交于
The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller. This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10). Signed-off-by: NErik van Luijk <evanluijk@interact.nl> [remove 'new blank line at EOF'] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 01 4月, 2015 4 次提交
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由 Bo Shen 提交于
Enable SPL support for at91sam9n12ek boards, now it supports boot up from NAND flash, serial flash. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
Enable SPL support for at91sam9x5ek board. Now, it supports boot up from NAND flash and SPI flash. Signed-off-by: NBo Shen <voice.shen@atmel.com>
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由 Bo Shen 提交于
The commit 8dfafdde (Introduce common timer functions), add common timer functions, we can use them directly. Signed-off-by: NBo Shen <voice.shen@atmel.com> [rebase on current master] Sigend-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Bo Shen 提交于
Signed-off-by: NBo Shen <voice.shen@atmel.com> [rebase on current master] Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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- 21 2月, 2015 1 次提交
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由 Masahiro Yamada 提交于
Move arch/arm/include/asm/arch-at91/* -> arch/arm/mach-at91/include/mach/* Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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