This SoC is too old.  It is difficult to maintain any longer.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

It has been a while since ARM Trusted Firmware supported UniPhier SoC
family.  U-Boot SPL was intended as a temporary loader that runs in
secure world.  It is a maintenance headache to support two different
boot mechanisms.  Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add the boot device table and reset deassertion for eMMC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

For LD11 and LD20 SoCs, the RST_n pin is asserted by default.  If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now.  This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initial support for PXs3 SoC.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The code here is cluttered due to the switch statement.  Introduce a
table of callbacks to clean up the initialization code across SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks.  Separate the UMC clocks and the other
clocks for better code reuse across SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

 - Initialize PLLs (SPL initializes only DPLL to save the precious
   SPL memory footprint)
 - Adjust CPLL/MPLL to the final tape-out frequency
 - Set the Cortex-A53 clock to the maximum frequency since it is
   running at 500MHz (SPLL/4) on startup
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper.  Split the common code into pll-base-ld20.c for easier
re-use.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper.  Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper.  Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is a low-cost ARMv8 SoC from Socionext Inc.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long.  It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family.  Also, rename files for consistency.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: NTom Rini <trini@konsulko.com>

The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled.  Each SoC has its own defconfig file
for the build-test coverage.  Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.

Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture.  In fact, some
SoCs of UniPhier family are very similar:
 - PH1-LD4 and PH1-sLD8
 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit)

This commit will be helpful to merge some defconfig files for better
maintainability.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>