p1014rdb: set ddr bus width properly depending on SVR
Currently, for NAND boot for the P1010/4RDB we hard code the DDR configuration. We can still dynamically set the DDR bus width in the nand spl so the P1010/4RDB boards can boot from the same u-boot image Signed-off-by: NMatthew McClintock <msm@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com>
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