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体验新版 GitCode,发现更多精彩内容 >>
提交
3a990bfa
编写于
7月 03, 2014
作者:
D
Dirk Eibach
提交者:
Tom Rini
7月 07, 2014
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
board: gdsys: Make gdsys osd hardware detection more robust
Signed-off-by:
N
Dirk Eibach
<
dirk.eibach@gdsys.cc
>
上级
5568fb44
变更
5
隐藏空白更改
内联
并排
Showing
5 changed file
with
79 addition
and
60 deletion
+79
-60
board/gdsys/405ep/iocon.c
board/gdsys/405ep/iocon.c
+5
-12
board/gdsys/common/osd.c
board/gdsys/common/osd.c
+74
-39
drivers/i2c/ihs_i2c.c
drivers/i2c/ihs_i2c.c
+0
-1
include/configs/dlvision-10g.h
include/configs/dlvision-10g.h
+0
-2
include/configs/iocon.h
include/configs/iocon.h
+0
-6
未找到文件。
board/gdsys/405ep/iocon.c
浏览文件 @
3a990bfa
...
...
@@ -15,7 +15,6 @@
#include "405ep.h"
#include <gdsys_fpga.h>
#include "../common/dp501.h"
#include "../common/osd.h"
#include "../common/mclink.h"
...
...
@@ -99,8 +98,6 @@ enum {
unsigned
int
mclink_fpgacount
;
struct
ihs_fpga
*
fpga_ptr
[]
=
CONFIG_SYS_FPGA_PTR
;
int
dp501_i2c
[]
=
CONFIG_SYS_DP501_I2C
;
static
int
setup_88e1518
(
const
char
*
bus
,
unsigned
char
addr
);
int
fpga_set_reg
(
u32
fpga
,
u16
*
reg
,
off_t
regoff
,
u16
data
)
...
...
@@ -374,20 +371,16 @@ int last_stage_init(void)
u16
fpga_features
;
int
feature_carrier_speed
=
fpga_features
&
(
1
<<
4
);
bool
ch0_rgmii2_present
=
false
;
int
old_bus
=
i2c_get_bus_num
();
FPGA_GET_REG
(
0
,
fpga_features
,
&
fpga_features
);
/* Turn on Parade DP501 */
pca9698_direction_output
(
0x20
,
9
,
1
);
udelay
(
500000
);
i2c_set_bus_num
(
dp501_i2c
[
0
]);
dp501_powerup
(
0x08
);
i2c_set_bus_num
(
old_bus
);
if
(
!
legacy
)
{
/* Turn on Parade DP501 */
pca9698_direction_output
(
0x20
,
9
,
1
);
udelay
(
500000
);
if
(
!
legacy
)
ch0_rgmii2_present
=
!
pca9698_get_value
(
0x20
,
30
);
}
print_fpga_info
(
0
,
ch0_rgmii2_present
);
osd_probe
(
0
);
...
...
board/gdsys/common/osd.c
浏览文件 @
3a990bfa
...
...
@@ -9,6 +9,7 @@
#include <i2c.h>
#include <malloc.h>
#include "dp501.h"
#include <gdsys_fpga.h>
#define CH7301_I2C_ADDR 0x75
...
...
@@ -24,6 +25,8 @@
#define SIL1178_MASTER_I2C_ADDRESS 0x38
#define SIL1178_SLAVE_I2C_ADDRESS 0x39
#define DP501_I2C_ADDR 0x08
#define PIXCLK_640_480_60 25180000
enum
{
...
...
@@ -54,18 +57,23 @@ u16 *buf;
unsigned
int
max_osd_screen
=
CONFIG_SYS_OSD_SCREENS
-
1
;
#ifdef CONFIG_SYS_
CH7301
int
ch7301_i2c
[]
=
CONFIG_SYS_CH73
01_I2C
;
#ifdef CONFIG_SYS_
ICS8N3QV01_I2C
int
ics8n3qv01_i2c
[]
=
CONFIG_SYS_ICS8N3QV
01_I2C
;
#endif
#ifdef CONFIG_SYS_
ICS8N3QV01
int
ics8n3qv01_i2c
[]
=
CONFIG_SYS_ICS8N3QV
01_I2C
;
#ifdef CONFIG_SYS_
CH7301_I2C
int
ch7301_i2c
[]
=
CONFIG_SYS_CH73
01_I2C
;
#endif
#ifdef CONFIG_SYS_SIL1178
#ifdef CONFIG_SYS_SIL1178
_I2C
int
sil1178_i2c
[]
=
CONFIG_SYS_SIL1178_I2C
;
#endif
#ifdef CONFIG_SYS_DP501_I2C
int
dp501_i2c
[]
=
CONFIG_SYS_DP501_I2C
;
#endif
#ifdef CONFIG_SYS_MPC92469AC
static
void
mpc92469ac_calc_parameters
(
unsigned
int
fout
,
unsigned
int
*
post_div
,
unsigned
int
*
feedback_div
)
...
...
@@ -118,7 +126,7 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout)
}
#endif
#ifdef CONFIG_SYS_ICS8N3QV01
#ifdef CONFIG_SYS_ICS8N3QV01
_I2C
static
unsigned
int
ics8n3qv01_get_fout_calc
(
unsigned
index
)
{
...
...
@@ -283,6 +291,8 @@ int osd_probe(unsigned screen)
u16
features
;
u8
value
;
int
old_bus
=
i2c_get_bus_num
();
bool
pixclock_present
=
false
;
bool
output_driver_present
=
false
;
FPGA_GET_REG
(
0
,
osd
.
version
,
&
version
);
FPGA_GET_REG
(
0
,
osd
.
features
,
&
features
);
...
...
@@ -297,51 +307,76 @@ int osd_probe(unsigned screen)
printf
(
"OSD%d: Digital-OSD version %01d.%02d, %d"
"x%d characters
\n
"
,
screen
,
version
/
100
,
version
%
100
,
base_width
,
base_height
);
#ifdef CONFIG_SYS_CH7301
i2c_set_bus_num
(
ch7301_i2c
[
screen
]);
value
=
i2c_reg_read
(
CH7301_I2C_ADDR
,
CH7301_DID
);
if
(
value
!=
0x17
)
{
printf
(
" Probing CH7301 failed, DID %02x
\n
"
,
value
);
i2c_set_bus_num
(
old_bus
);
return
-
1
;
}
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPCP
,
0x08
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPD
,
0x16
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPF
,
0x60
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_DC
,
0x09
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_PM
,
0xc0
);
#endif
/* setup pixclock */
#ifdef CONFIG_SYS_MPC92469AC
pixclock_present
=
true
;
mpc92469ac_set
(
screen
,
PIXCLK_640_480_60
);
#endif
#ifdef CONFIG_SYS_ICS8N3QV01
#ifdef CONFIG_SYS_ICS8N3QV01
_I2C
i2c_set_bus_num
(
ics8n3qv01_i2c
[
screen
]);
ics8n3qv01_set
(
PIXCLK_640_480_60
);
if
(
!
i2c_probe
(
ICS8N3QV01_I2C_ADDR
))
{
ics8n3qv01_set
(
PIXCLK_640_480_60
);
pixclock_present
=
true
;
}
#endif
#ifdef CONFIG_SYS_SIL1178
if
(
!
pixclock_present
)
printf
(
" no pixelclock found
\n
"
);
/* setup output driver */
#ifdef CONFIG_SYS_CH7301_I2C
i2c_set_bus_num
(
ch7301_i2c
[
screen
]);
if
(
!
i2c_probe
(
CH7301_I2C_ADDR
))
{
value
=
i2c_reg_read
(
CH7301_I2C_ADDR
,
CH7301_DID
);
if
(
value
==
0x17
)
{
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPCP
,
0x08
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPD
,
0x16
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_TPF
,
0x60
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_DC
,
0x09
);
i2c_reg_write
(
CH7301_I2C_ADDR
,
CH7301_PM
,
0xc0
);
output_driver_present
=
true
;
}
}
#endif
#ifdef CONFIG_SYS_SIL1178_I2C
i2c_set_bus_num
(
sil1178_i2c
[
screen
]);
value
=
i2c_reg_read
(
SIL1178_SLAVE_I2C_ADDRESS
,
0x02
);
if
(
value
!=
0x06
)
{
printf
(
" Probing SIL1178, DEV_IDL %02x
\n
"
,
value
);
i2c_set_bus_num
(
old_bus
);
return
-
1
;
if
(
!
i2c_probe
(
SIL1178_SLAVE_I2C_ADDRESS
))
{
value
=
i2c_reg_read
(
SIL1178_SLAVE_I2C_ADDRESS
,
0x02
);
if
(
value
==
0x06
)
{
/*
* magic initialization sequence,
* adapted from datasheet
*/
i2c_reg_write
(
SIL1178_SLAVE_I2C_ADDRESS
,
0x08
,
0x36
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0f
,
0x44
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0f
,
0x4c
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0e
,
0x10
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0a
,
0x80
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x09
,
0x30
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0c
,
0x89
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0d
,
0x60
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x08
,
0x36
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x08
,
0x37
);
output_driver_present
=
true
;
}
}
#endif
#ifdef CONFIG_SYS_DP501_I2C
i2c_set_bus_num
(
dp501_i2c
[
screen
]);
if
(
!
i2c_probe
(
DP501_I2C_ADDR
))
{
dp501_powerup
(
DP501_I2C_ADDR
);
output_driver_present
=
true
;
}
/* magic initialization sequence adapted from datasheet */
i2c_reg_write
(
SIL1178_SLAVE_I2C_ADDRESS
,
0x08
,
0x36
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0f
,
0x44
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0f
,
0x4c
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0e
,
0x10
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0a
,
0x80
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x09
,
0x30
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0c
,
0x89
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x0d
,
0x60
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x08
,
0x36
);
i2c_reg_write
(
SIL1178_MASTER_I2C_ADDRESS
,
0x08
,
0x37
);
#endif
if
(
!
output_driver_present
)
printf
(
" no output driver found
\n
"
);
FPGA_SET_REG
(
screen
,
osd
.
control
,
0x0049
);
FPGA_SET_REG
(
screen
,
osd
.
xy_size
,
((
32
-
1
)
<<
8
)
|
(
16
-
1
));
...
...
drivers/i2c/ihs_i2c.c
浏览文件 @
3a990bfa
...
...
@@ -34,7 +34,6 @@ static int wait_for_int(bool read)
|
(
read
?
I2CINT_RECEIVE_EV
:
I2CINT_TRANSMIT_EV
))))
{
udelay
(
10
);
if
(
ctr
++
>
5000
)
{
printf
(
"I2C timeout
\n
"
);
return
1
;
}
FPGA_GET_REG
(
I2C_ADAP_HWNR
,
i2c
.
interrupt_status
,
&
val
);
...
...
include/configs/dlvision-10g.h
浏览文件 @
3a990bfa
...
...
@@ -121,9 +121,7 @@
{ 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
#define CONFIG_DTT_TACH_LIMIT 0xa10
#define CONFIG_SYS_ICS8N3QV01
#define CONFIG_SYS_ICS8N3QV01_I2C {0, 1}
#define CONFIG_SYS_SIL1178
#define CONFIG_SYS_SIL1178_I2C {0, 1}
/* EBC peripherals */
...
...
include/configs/iocon.h
浏览文件 @
3a990bfa
...
...
@@ -166,11 +166,6 @@ int fpga_gpio_get(unsigned int bus, int pin);
} while (0)
#define I2C_DELAY udelay(25)
/* 1/4 I2C clock duration */
/*
* OSD hardware
*/
#define CONFIG_SYS_MPC92469AC
/*
* FLASH organization
*/
...
...
@@ -298,7 +293,6 @@ int fpga_gpio_get(unsigned int bus, int pin);
/*
* OSD Setup
*/
#define CONFIG_SYS_ICS8N3QV01
#define CONFIG_SYS_MPC92469AC
#define CONFIG_SYS_OSD_SCREENS 1
#define CONFIG_SYS_DP501_DIFFERENTIAL
...
...
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