提交 3191611a 编写于 作者: M Marek Vasut

arm: socfpga: reset: Add function to reset add peripherals

Add socfpga_per_reset_all() function to reset all peripherals
but the L4 watchdog. This is needed in the SPL.
Signed-off-by: NMarek Vasut <marex@denx.de>
上级 292260ca
...@@ -13,6 +13,7 @@ void reset_deassert_peripherals_handoff(void); ...@@ -13,6 +13,7 @@ void reset_deassert_peripherals_handoff(void);
void socfpga_bridges_reset(int enable); void socfpga_bridges_reset(int enable);
void socfpga_per_reset(u32 reset, int set); void socfpga_per_reset(u32 reset, int set);
void socfpga_per_reset_all(void);
struct socfpga_reset_manager { struct socfpga_reset_manager {
u32 status; u32 status;
......
...@@ -39,6 +39,19 @@ void socfpga_per_reset(u32 reset, int set) ...@@ -39,6 +39,19 @@ void socfpga_per_reset(u32 reset, int set)
clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); clrbits_le32(reg, 1 << RSTMGR_RESET(reset));
} }
/*
* Assert reset on every peripheral but L4WD0.
* Watchdog must be kept intact to prevent glitches
* and/or hangs.
*/
void socfpga_per_reset_all(void)
{
const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0));
writel(~l4wd0, &reset_manager_base->per_mod_reset);
writel(0xffffffff, &reset_manager_base->per2_mod_reset);
}
/* /*
* Write the reset manager register to cause reset * Write the reset manager register to cause reset
*/ */
......
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