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体验新版 GitCode,发现更多精彩内容 >>
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066b2d68
编写于
11月 04, 2013
作者:
E
Eric Nelson
提交者:
Stefano Babic
11月 13, 2013
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
i.MX6DQ/DLS: remove useless mux/pad declarations
Signed-off-by:
N
Eric Nelson
<
eric.nelson@boundarydevices.com
>
上级
10fda487
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
0 addition
and
160 deletion
+0
-160
arch/arm/include/asm/arch-mx6/mx6dl_pins.h
arch/arm/include/asm/arch-mx6/mx6dl_pins.h
+0
-78
arch/arm/include/asm/arch-mx6/mx6q_pins.h
arch/arm/include/asm/arch-mx6/mx6q_pins.h
+0
-82
未找到文件。
arch/arm/include/asm/arch-mx6/mx6dl_pins.h
浏览文件 @
066b2d68
...
...
@@ -424,70 +424,6 @@ enum {
MX6_PAD_DRAM_CAS__MMDC_DRAM_CAS
=
IOMUX_PAD
(
0x0464
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_CS0__MMDC_DRAM_CS_0
=
IOMUX_PAD
(
0x0468
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_CS1__MMDC_DRAM_CS_1
=
IOMUX_PAD
(
0x046C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D0__MMDC_DRAM_D_0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D1__MMDC_DRAM_D_1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D10__MMDC_DRAM_D_10
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D11__MMDC_DRAM_D_11
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D12__MMDC_DRAM_D_12
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D13__MMDC_DRAM_D_13
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D14__MMDC_DRAM_D_14
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D15__MMDC_DRAM_D_15
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D16__MMDC_DRAM_D_16
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D17__MMDC_DRAM_D_17
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D18__MMDC_DRAM_D_18
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D19__MMDC_DRAM_D_19
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D2__MMDC_DRAM_D_2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D20__MMDC_DRAM_D_20
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D21__MMDC_DRAM_D_21
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D22__MMDC_DRAM_D_22
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D23__MMDC_DRAM_D_23
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D24__MMDC_DRAM_D_24
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D25__MMDC_DRAM_D_25
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D26__MMDC_DRAM_D_26
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D27__MMDC_DRAM_D_27
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D28__MMDC_DRAM_D_28
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D29__MMDC_DRAM_D_29
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D3__MMDC_DRAM_D_3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D30__MMDC_DRAM_D_30
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D31__MMDC_DRAM_D_31
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D32__MMDC_DRAM_D_32
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D33__MMDC_DRAM_D_33
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D34__MMDC_DRAM_D_34
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D35__MMDC_DRAM_D_35
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D36__MMDC_DRAM_D_36
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D37__MMDC_DRAM_D_37
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D38__MMDC_DRAM_D_38
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D39__MMDC_DRAM_D_39
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D4__MMDC_DRAM_D_4
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D40__MMDC_DRAM_D_40
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D41__MMDC_DRAM_D_41
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D42__MMDC_DRAM_D_42
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D43__MMDC_DRAM_D_43
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D44__MMDC_DRAM_D_44
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D45__MMDC_DRAM_D_45
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D46__MMDC_DRAM_D_46
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D47__MMDC_DRAM_D_47
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D48__MMDC_DRAM_D_48
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D49__MMDC_DRAM_D_49
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D5__MMDC_DRAM_D_5
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D50__MMDC_DRAM_D_50
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D51__MMDC_DRAM_D_51
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D52__MMDC_DRAM_D_52
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D53__MMDC_DRAM_D_53
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D54__MMDC_DRAM_D_54
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D55__MMDC_DRAM_D_55
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D56__MMDC_DRAM_D_56
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D57__MMDC_DRAM_D_57
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D58__MMDC_DRAM_D_58
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D59__MMDC_DRAM_D_59
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D6__MMDC_DRAM_D_6
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D60__MMDC_DRAM_D_60
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D61__MMDC_DRAM_D_61
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D62__MMDC_DRAM_D_62
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D63__MMDC_DRAM_D_63
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D7__MMDC_DRAM_D_7
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D8__MMDC_DRAM_D_8
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D9__MMDC_DRAM_D_9
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM0__MMDC_DRAM_DQM_0
=
IOMUX_PAD
(
0x0470
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM1__MMDC_DRAM_DQM_1
=
IOMUX_PAD
(
0x0474
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM2__MMDC_DRAM_DQM_2
=
IOMUX_PAD
(
0x0478
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
...
...
@@ -1238,16 +1174,6 @@ enum {
MX6_PAD_KEY_ROW4__GPIO4_IO15
=
IOMUX_PAD
(
0x0650
,
0x0268
,
5
,
0x0000
,
0
,
0
),
MX6_PAD_KEY_ROW4__MMDC_MMDC_DEBUG_50
=
IOMUX_PAD
(
0x0650
,
0x0268
,
6
,
0x0000
,
0
,
0
),
MX6_PAD_KEY_ROW4__PL301_SIM_MX6DL_PER1_HADDR_8
=
IOMUX_PAD
(
0x0650
,
0x0268
,
7
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_NANDF_ALE__NAND_ALE
=
IOMUX_PAD
(
0x0654
,
0x026C
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_NANDF_ALE__SD4_RESET
=
IOMUX_PAD
(
0x0654
,
0x026C
,
1
,
0x0000
,
0
,
0
),
MX6_PAD_NANDF_ALE__PCIE_CTRL_DIAG_STATUS_BUS_MUX_0
=
IOMUX_PAD
(
0x0654
,
0x026C
,
2
,
0x0000
,
0
,
0
),
...
...
@@ -1362,10 +1288,6 @@ enum {
MX6_PAD_NANDF_WP_B__MIPI_CORE_DPHY_TEST_OUT_32
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
6
,
0x0000
,
0
,
0
),
MX6_PAD_NANDF_WP_B__USDHC4_CLKO
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
8
,
0x0000
,
0
,
0
),
MX6_PAD_NANDF_WP_B__I2C4_SCL
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
9
|
IOMUX_CONFIG_SION
,
0x0880
,
2
,
0
),
MX6_PAD_PMIC_ON_REQ__SNVS_LP_WRAPPER_SNVS_WAKEUP_ALARM
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_PMIC_STBY_REQ__CCM_PMIC_VSTBY_REQ
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_POR_B__SRC_POR_B
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_RESET_IN_B__SRC_RESET_B
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_RGMII_RD0__HSI_RX_READY
=
IOMUX_PAD
(
0x0694
,
0x02AC
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_RGMII_RD0__RGMII_RD0
=
IOMUX_PAD
(
0x0694
,
0x02AC
,
1
,
0x0818
,
1
,
0
),
MX6_PAD_RGMII_RD0__GPIO6_IO25
=
IOMUX_PAD
(
0x0694
,
0x02AC
,
5
,
0x0000
,
0
,
0
),
...
...
arch/arm/include/asm/arch-mx6/mx6q_pins.h
浏览文件 @
066b2d68
...
...
@@ -780,45 +780,13 @@ enum {
MX6_PAD_ENET_MDC__GPIO1_IO31
=
IOMUX_PAD
(
0x0508
,
0x01F4
,
5
,
0x0000
,
0
,
0
),
MX6_PAD_ENET_MDC__SATA_PHY_TMS
=
IOMUX_PAD
(
0x0508
,
0x01F4
,
6
,
0x0000
,
0
,
0
),
MX6_PAD_ENET_MDC__USBPHY2_RX_DISCON
=
IOMUX_PAD
(
0x0508
,
0x01F4
,
7
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D40__MMDC_DRAM_D_40
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D41__MMDC_DRAM_D_41
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D42__MMDC_DRAM_D_42
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D43__MMDC_DRAM_D_43
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D44__MMDC_DRAM_D_44
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D45__MMDC_DRAM_D_45
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D46__MMDC_DRAM_D_46
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D47__MMDC_DRAM_D_47
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS5__MMDC_DRAM_SDQS_5
=
IOMUX_PAD
(
0x050C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM5__MMDC_DRAM_DQM_5
=
IOMUX_PAD
(
0x0510
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D32__MMDC_DRAM_D_32
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D33__MMDC_DRAM_D_33
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D34__MMDC_DRAM_D_34
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D35__MMDC_DRAM_D_35
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D36__MMDC_DRAM_D_36
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D37__MMDC_DRAM_D_37
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D38__MMDC_DRAM_D_38
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D39__MMDC_DRAM_D_39
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM4__MMDC_DRAM_DQM_4
=
IOMUX_PAD
(
0x0514
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS4__MMDC_DRAM_SDQS_4
=
IOMUX_PAD
(
0x0518
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D24__MMDC_DRAM_D_24
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D25__MMDC_DRAM_D_25
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D26__MMDC_DRAM_D_26
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D27__MMDC_DRAM_D_27
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D28__MMDC_DRAM_D_28
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D29__MMDC_DRAM_D_29
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS3__MMDC_DRAM_SDQS_3
=
IOMUX_PAD
(
0x051C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D30__MMDC_DRAM_D_30
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D31__MMDC_DRAM_D_31
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM3__MMDC_DRAM_DQM_3
=
IOMUX_PAD
(
0x0520
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D16__MMDC_DRAM_D_16
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D17__MMDC_DRAM_D_17
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D18__MMDC_DRAM_D_18
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D19__MMDC_DRAM_D_19
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D20__MMDC_DRAM_D_20
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D21__MMDC_DRAM_D_21
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D22__MMDC_DRAM_D_22
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS2__MMDC_DRAM_SDQS_2
=
IOMUX_PAD
(
0x0524
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D23__MMDC_DRAM_D_23
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM2__MMDC_DRAM_DQM_2
=
IOMUX_PAD
(
0x0528
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_A0__MMDC_DRAM_A_0
=
IOMUX_PAD
(
0x052C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_A1__MMDC_DRAM_A_1
=
IOMUX_PAD
(
0x0530
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
...
...
@@ -851,46 +819,14 @@ enum {
MX6_PAD_DRAM_SDODT0__MMDC_DRAM_ODT_0
=
IOMUX_PAD
(
0x059C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDODT1__MMDC_DRAM_ODT_1
=
IOMUX_PAD
(
0x05A0
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDWE__MMDC_DRAM_SDWE
=
IOMUX_PAD
(
0x05A4
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D0__MMDC_DRAM_D_0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D1__MMDC_DRAM_D_1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D2__MMDC_DRAM_D_2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D3__MMDC_DRAM_D_3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D4__MMDC_DRAM_D_4
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D5__MMDC_DRAM_D_5
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS0__MMDC_DRAM_SDQS_0
=
IOMUX_PAD
(
0x05A8
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D6__MMDC_DRAM_D_6
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D7__MMDC_DRAM_D_7
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM0__MMDC_DRAM_DQM_0
=
IOMUX_PAD
(
0x05AC
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D8__MMDC_DRAM_D_8
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D9__MMDC_DRAM_D_9
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D10__MMDC_DRAM_D_10
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D11__MMDC_DRAM_D_11
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D12__MMDC_DRAM_D_12
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D13__MMDC_DRAM_D_13
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D14__MMDC_DRAM_D_14
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS1__MMDC_DRAM_SDQS_1
=
IOMUX_PAD
(
0x05B0
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D15__MMDC_DRAM_D_15
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM1__MMDC_DRAM_DQM_1
=
IOMUX_PAD
(
0x05B4
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D48__MMDC_DRAM_D_48
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D49__MMDC_DRAM_D_49
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D50__MMDC_DRAM_D_50
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D51__MMDC_DRAM_D_51
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D52__MMDC_DRAM_D_52
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D53__MMDC_DRAM_D_53
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D54__MMDC_DRAM_D_54
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D55__MMDC_DRAM_D_55
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS6__MMDC_DRAM_SDQS_6
=
IOMUX_PAD
(
0x05B8
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM6__MMDC_DRAM_DQM_6
=
IOMUX_PAD
(
0x05BC
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D56__MMDC_DRAM_D_56
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_SDQS7__MMDC_DRAM_SDQS_7
=
IOMUX_PAD
(
0x05C0
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D57__MMDC_DRAM_D_57
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D58__MMDC_DRAM_D_58
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D59__MMDC_DRAM_D_59
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D60__MMDC_DRAM_D_60
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_DQM7__MMDC_DRAM_DQM_7
=
IOMUX_PAD
(
0x05C4
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D61__MMDC_DRAM_D_61
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D62__MMDC_DRAM_D_62
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_DRAM_D63__MMDC_DRAM_D_63
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_KEY_COL0__ECSPI1_SCLK
=
IOMUX_PAD
(
0x05C8
,
0x01F8
,
0
,
0x07F4
,
2
,
0
),
MX6_PAD_KEY_COL0__ENET_RX_DATA3
=
IOMUX_PAD
(
0x05C8
,
0x01F8
,
1
,
0x0854
,
1
,
0
),
MX6_PAD_KEY_COL0__AUD5_TXC
=
IOMUX_PAD
(
0x05C8
,
0x01F8
,
2
,
0x07DC
,
1
,
0
),
...
...
@@ -1251,24 +1187,6 @@ enum {
MX6_PAD_JTAG_TDI__SJC_TDI
=
IOMUX_PAD
(
0x0684
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_JTAG_TCK__SJC_TCK
=
IOMUX_PAD
(
0x0688
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_JTAG_TDO__SJC_TDO
=
IOMUX_PAD
(
0x068C
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_TAMPER__SNVS_LP_WRAP_SNVS_TD1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_PMIC_ON_REQ__SNVS_LPWRAP_WKALM
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_PMIC_STBY_REQ__CCM_PMIC_STBYRQ
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_POR_B__SRC_POR_B
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_BOOT_MODE1__SRC_BOOT_MODE_1
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_RESET_IN_B__SRC_RESET_B
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_BOOT_MODE0__SRC_BOOT_MODE_0
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_TEST_MODE__TCU_TEST_MODE
=
IOMUX_PAD
(
NO_PAD_I
,
NO_MUX_I
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_SD3_DAT7__SD3_DATA7
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
0
,
0x0000
,
0
,
0
),
MX6_PAD_SD3_DAT7__UART1_TX_DATA
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
1
,
0x0000
,
0
,
0
),
MX6_PAD_SD3_DAT7__UART1_RX_DATA
=
IOMUX_PAD
(
0x0690
,
0x02A8
,
1
,
0x0920
,
2
,
0
),
...
...
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