cmd_ide.c 50.1 KB
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/*
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 * (C) Copyright 2000-2005
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

/*
 * IDE support
 */
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#include <common.h>
#include <config.h>
#include <watchdog.h>
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
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#include <asm/io.h>
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#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
# include <pcmcia.h>
#endif
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#ifdef CONFIG_8xx
# include <mpc8xx.h>
#endif
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#ifdef CONFIG_MPC5xxx
#include <mpc5xxx.h>
#endif
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#ifdef CONFIG_ORION5X
#include <asm/arch/orion5x.h>
#endif

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#include <ide.h>
#include <ata.h>
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#ifdef CONFIG_STATUS_LED
# include <status_led.h>
#endif
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#ifdef CONFIG_IDE_8xx_DIRECT
DECLARE_GLOBAL_DATA_PTR;
#endif

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#ifdef __PPC__
# define EIEIO		__asm__ volatile ("eieio")
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# define SYNC		__asm__ volatile ("sync")
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#else
# define EIEIO		/* nothing */
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# define SYNC		/* nothing */
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#endif

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#ifdef CONFIG_IDE_8xx_DIRECT
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/* Timings for IDE Interface
 *
 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
 * 70	   165	    30	   PIO-Mode 0, [ns]
 *  4	     9	     2		       [Cycles]
 * 50	   125	    20	   PIO-Mode 1, [ns]
 *  3	     7	     2		       [Cycles]
 * 30	   100	    15	   PIO-Mode 2, [ns]
 *  2	     6	     1		       [Cycles]
 * 30	    80	    10	   PIO-Mode 3, [ns]
 *  2	     5	     1		       [Cycles]
 * 25	    70	    10	   PIO-Mode 4, [ns]
 *  2	     4	     1		       [Cycles]
 */

const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
{
    /*	Setup  Length  Hold  */
	{ 70,	165,	30 },		/* PIO-Mode 0, [ns]	*/
	{ 50,	125,	20 },		/* PIO-Mode 1, [ns]	*/
	{ 30,	101,	15 },		/* PIO-Mode 2, [ns]	*/
	{ 30,	 80,	10 },		/* PIO-Mode 3, [ns]	*/
	{ 25,	 70,	10 },		/* PIO-Mode 4, [ns]	*/
};

static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];

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#ifndef	CONFIG_SYS_PIO_MODE
#define	CONFIG_SYS_PIO_MODE	0		/* use a relaxed default */
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#endif
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static int pio_mode = CONFIG_SYS_PIO_MODE;
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/* Make clock cycles and always round up */

#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )

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#endif /* CONFIG_IDE_8xx_DIRECT */

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/* ------------------------------------------------------------------------- */

/* Current I/O Device	*/
static int curr_device = -1;

/* Current offset for IDE0 / IDE1 bus access	*/
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ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
	CONFIG_SYS_ATA_IDE0_OFFSET,
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#endif
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#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
	CONFIG_SYS_ATA_IDE1_OFFSET,
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#endif
};

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static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
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block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
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/* ------------------------------------------------------------------------- */

#ifdef CONFIG_IDE_LED
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# if !defined(CONFIG_BMS2003)	&& \
     !defined(CONFIG_CPC45)	&& \
     !defined(CONFIG_KUP4K) && \
     !defined(CONFIG_KUP4X)
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static void  ide_led   (uchar led, uchar status);
#else
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extern void  ide_led   (uchar led, uchar status);
#endif
#else
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#define ide_led(a,b)	/* dummy */
#endif

#ifdef CONFIG_IDE_RESET
static void  ide_reset (void);
#else
#define ide_reset()	/* dummy */
#endif

static void  ide_ident (block_dev_desc_t *dev_desc);
static uchar ide_wait  (int dev, ulong t);

#define IDE_TIME_OUT	2000	/* 2 sec timeout */

#define ATAPI_TIME_OUT	7000	/* 7 sec timeout (5 sec seems to work...) */

#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */

static void input_data(int dev, ulong *sect_buf, int words);
static void output_data(int dev, ulong *sect_buf, int words);
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);

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#ifndef CONFIG_SYS_ATA_PORT_ADDR
#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
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#endif
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#ifdef CONFIG_ATAPI
static void	atapi_inquiry(block_dev_desc_t *dev_desc);
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ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
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#endif


#ifdef CONFIG_IDE_8xx_DIRECT
static void set_pcmcia_timing (int pmode);
#endif

/* ------------------------------------------------------------------------- */

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int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
    int rcode = 0;

    switch (argc) {
    case 0:
    case 1:
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	return cmd_usage(cmdtp);
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    case 2:
	if (strncmp(argv[1],"res",3) == 0) {
		puts ("\nReset IDE"
#ifdef CONFIG_IDE_8xx_DIRECT
			" on PCMCIA " PCMCIA_SLOT_MSG
#endif
			": ");

		ide_init ();
		return 0;
	} else if (strncmp(argv[1],"inf",3) == 0) {
		int i;

		putc ('\n');

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		for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
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			if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
				continue; /* list only known devices */
			printf ("IDE device %d: ", i);
			dev_print(&ide_dev_desc[i]);
		}
		return 0;

	} else if (strncmp(argv[1],"dev",3) == 0) {
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		if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
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			puts ("\nno IDE devices available\n");
			return 1;
		}
		printf ("\nIDE device %d: ", curr_device);
		dev_print(&ide_dev_desc[curr_device]);
		return 0;
	} else if (strncmp(argv[1],"part",4) == 0) {
		int dev, ok;

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		for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
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			if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
				++ok;
				if (dev)
					putc ('\n');
				print_part(&ide_dev_desc[dev]);
			}
		}
		if (!ok) {
			puts ("\nno IDE devices available\n");
			rcode ++;
		}
		return rcode;
	}
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	return cmd_usage(cmdtp);
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    case 3:
	if (strncmp(argv[1],"dev",3) == 0) {
		int dev = (int)simple_strtoul(argv[2], NULL, 10);

		printf ("\nIDE device %d: ", dev);
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		if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
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			puts ("unknown device\n");
			return 1;
		}
		dev_print(&ide_dev_desc[dev]);
		/*ide_print (dev);*/

		if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
			return 1;
		}

		curr_device = dev;

		puts ("... is now current device\n");

		return 0;
	} else if (strncmp(argv[1],"part",4) == 0) {
		int dev = (int)simple_strtoul(argv[2], NULL, 10);

		if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
				print_part(&ide_dev_desc[dev]);
		} else {
			printf ("\nIDE device %d not available\n", dev);
			rcode = 1;
		}
		return rcode;
#if 0
	} else if (strncmp(argv[1],"pio",4) == 0) {
		int mode = (int)simple_strtoul(argv[2], NULL, 10);

		if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
			puts ("\nSetting ");
			pio_mode = mode;
			ide_init ();
		} else {
			printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
				mode, IDE_MAX_PIO_MODE);
		}
		return;
#endif
	}

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	return cmd_usage(cmdtp);
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    default:
	/* at least 4 args */

	if (strcmp(argv[1],"read") == 0) {
		ulong addr = simple_strtoul(argv[2], NULL, 16);
		ulong cnt  = simple_strtoul(argv[4], NULL, 16);
		ulong n;
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#ifdef CONFIG_SYS_64BIT_LBA
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		lbaint_t blk  = simple_strtoull(argv[3], NULL, 16);
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		printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
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			curr_device, blk, cnt);
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#else
		lbaint_t blk  = simple_strtoul(argv[3], NULL, 16);

		printf ("\nIDE read: device %d block # %ld, count %ld ... ",
			curr_device, blk, cnt);
#endif
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		n = ide_dev_desc[curr_device].block_read (curr_device,
							  blk, cnt,
							  (ulong *)addr);
		/* flush cache after read */
		flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);

		printf ("%ld blocks read: %s\n",
			n, (n==cnt) ? "OK" : "ERROR");
		if (n==cnt) {
			return 0;
		} else {
			return 1;
		}
	} else if (strcmp(argv[1],"write") == 0) {
		ulong addr = simple_strtoul(argv[2], NULL, 16);
		ulong cnt  = simple_strtoul(argv[4], NULL, 16);
		ulong n;
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#ifdef CONFIG_SYS_64BIT_LBA
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		lbaint_t blk  = simple_strtoull(argv[3], NULL, 16);
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		printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
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			curr_device, blk, cnt);
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#else
		lbaint_t blk  = simple_strtoul(argv[3], NULL, 16);

		printf ("\nIDE write: device %d block # %ld, count %ld ... ",
			curr_device, blk, cnt);
#endif
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		n = ide_write (curr_device, blk, cnt, (ulong *)addr);

		printf ("%ld blocks written: %s\n",
			n, (n==cnt) ? "OK" : "ERROR");
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		if (n==cnt)
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			return 0;
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		else
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			return 1;
	} else {
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		return cmd_usage(cmdtp);
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	}

	return rcode;
    }
}

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int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
	char *boot_device = NULL;
	char *ep;
	int dev, part = 0;
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	ulong addr, cnt;
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	disk_partition_t info;
	image_header_t *hdr;
	int rcode = 0;
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#if defined(CONFIG_FIT)
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	const void *fit_hdr = NULL;
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#endif
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	show_boot_progress (41);
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	switch (argc) {
	case 1:
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		addr = CONFIG_SYS_LOAD_ADDR;
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		boot_device = getenv ("bootdevice");
		break;
	case 2:
		addr = simple_strtoul(argv[1], NULL, 16);
		boot_device = getenv ("bootdevice");
		break;
	case 3:
		addr = simple_strtoul(argv[1], NULL, 16);
		boot_device = argv[2];
		break;
	default:
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		show_boot_progress (-42);
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		return cmd_usage(cmdtp);
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	}
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	show_boot_progress (42);
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	if (!boot_device) {
		puts ("\n** No boot device **\n");
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		show_boot_progress (-43);
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		return 1;
	}
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	show_boot_progress (43);
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	dev = simple_strtoul(boot_device, &ep, 16);

	if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
		printf ("\n** Device %d not available\n", dev);
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		show_boot_progress (-44);
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		return 1;
	}
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	show_boot_progress (44);
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	if (*ep) {
		if (*ep != ':') {
			puts ("\n** Invalid boot device, use `dev[:part]' **\n");
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			show_boot_progress (-45);
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			return 1;
		}
		part = simple_strtoul(++ep, NULL, 16);
	}
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	show_boot_progress (45);
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	if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
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		show_boot_progress (-46);
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		return 1;
	}
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	show_boot_progress (46);
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	if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
	    (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
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		printf ("\n** Invalid partition type \"%.32s\""
			" (expect \"" BOOT_PART_TYPE "\")\n",
			info.type);
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		show_boot_progress (-47);
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		return 1;
	}
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	show_boot_progress (47);
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	printf ("\nLoading from IDE device %d, partition %d: "
		"Name: %.32s  Type: %.32s\n",
		dev, part, info.name, info.type);

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	debug ("First Block: %ld,  # of blocks: %ld, Block Size: %ld\n",
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		info.start, info.size, info.blksz);

	if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
		printf ("** Read error on %d:%d\n", dev, part);
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		show_boot_progress (-48);
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		return 1;
	}
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	show_boot_progress (48);
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	switch (genimg_get_format ((void *)addr)) {
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	case IMAGE_FORMAT_LEGACY:
		hdr = (image_header_t *)addr;
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		show_boot_progress (49);

		if (!image_check_hcrc (hdr)) {
			puts ("\n** Bad Header Checksum **\n");
			show_boot_progress (-50);
			return 1;
		}
		show_boot_progress (50);
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		image_print_contents (hdr);

		cnt = image_get_image_size (hdr);
		break;
#if defined(CONFIG_FIT)
	case IMAGE_FORMAT_FIT:
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		fit_hdr = (const void *)addr;
		puts ("Fit image detected...\n");

		cnt = fit_get_size (fit_hdr);
		break;
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#endif
	default:
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		show_boot_progress (-49);
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		puts ("** Unknown image type\n");
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		return 1;
	}

	cnt += info.blksz - 1;
	cnt /= info.blksz;
	cnt -= 1;

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	if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
		      (ulong *)(addr+info.blksz)) != cnt) {
		printf ("** Read error on %d:%d\n", dev, part);
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		show_boot_progress (-51);
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		return 1;
	}
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	show_boot_progress (51);
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#if defined(CONFIG_FIT)
	/* This cannot be done earlier, we need complete FIT image in RAM first */
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	if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
		if (!fit_check_format (fit_hdr)) {
			show_boot_progress (-140);
			puts ("** Bad FIT image format\n");
			return 1;
		}
		show_boot_progress (141);
		fit_print_contents (fit_hdr);
	}
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#endif
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	/* Loading ok, update default load address */

	load_addr = addr;

	/* Check if we should attempt an auto-start */
	if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
		char *local_args[2];
		extern int do_bootm (cmd_tbl_t *, int, int, char *[]);

		local_args[0] = argv[0];
		local_args[1] = NULL;

		printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);

		do_bootm (cmdtp, 0, 1, local_args);
		rcode = 1;
	}
	return rcode;
}

/* ------------------------------------------------------------------------- */

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void inline
__ide_outb(int dev, int port, unsigned char val)
{
	debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
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		dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
	outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
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}
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void ide_outb (int dev, int port, unsigned char val)
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		__attribute__((weak, alias("__ide_outb")));

unsigned char inline
__ide_inb(int dev, int port)
{
	uchar val;
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	val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
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	debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
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		dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
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	return val;
}
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unsigned char ide_inb(int dev, int port)
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			__attribute__((weak, alias("__ide_inb")));

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#ifdef CONFIG_TUNE_PIO
int inline
__ide_set_piomode(int pio_mode)
{
	return 0;
}
int inline ide_set_piomode(int pio_mode)
			__attribute__((weak, alias("__ide_set_piomode")));
#endif

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void ide_init (void)
{

#ifdef CONFIG_IDE_8xx_DIRECT
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	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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	volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
#endif
	unsigned char c;
	int i, bus;
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#if defined(CONFIG_SC3)
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	unsigned int ata_reset_time = ATA_RESET_TIME;
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#endif
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#ifdef CONFIG_IDE_8xx_PCCARD
	extern int pcmcia_on (void);
	extern int ide_devices_found; /* Initialized in check_ide_device() */
#endif	/* CONFIG_IDE_8xx_PCCARD */

#ifdef CONFIG_IDE_PREINIT
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	extern int ide_preinit (void);
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	WATCHDOG_RESET();

	if (ide_preinit ()) {
		puts ("ide_preinit failed\n");
		return;
	}
#endif	/* CONFIG_IDE_PREINIT */
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#ifdef CONFIG_IDE_8xx_PCCARD
	extern int pcmcia_on (void);
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	extern int ide_devices_found; /* Initialized in check_ide_device() */
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	WATCHDOG_RESET();

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	ide_devices_found = 0;
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	/* initialize the PCMCIA IDE adapter card */
581 582
	pcmcia_on();
	if (!ide_devices_found)
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		return;
	udelay (1000000);	/* 1 s */
#endif	/* CONFIG_IDE_8xx_PCCARD */

	WATCHDOG_RESET();

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#ifdef CONFIG_IDE_8xx_DIRECT
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	/* Initialize PIO timing tables */
	for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
592 593 594 595 596 597 598 599 600 601 602 603 604
		pio_config_clk[i].t_setup  = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
								gd->bus_clk);
		pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
								gd->bus_clk);
		pio_config_clk[i].t_hold   = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
								gd->bus_clk);
		debug ( "PIO Mode %d: setup=%2d ns/%d clk"
			"  len=%3d ns/%d clk"
			"  hold=%2d ns/%d clk\n",
			i,
			pio_config_ns[i].t_setup,  pio_config_clk[i].t_setup,
			pio_config_ns[i].t_length, pio_config_clk[i].t_length,
			pio_config_ns[i].t_hold,   pio_config_clk[i].t_hold);
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	}
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#endif /* CONFIG_IDE_8xx_DIRECT */
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	/* Reset the IDE just to be sure.
	 * Light LED's to show
	 */
	ide_led ((LED_IDE1 | LED_IDE2), 1);		/* LED's on	*/
	ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */

#ifdef CONFIG_IDE_8xx_DIRECT
	/* PCMCIA / IDE initialization for common mem space */
	pcmp->pcmc_pgcrb = 0;

	/* start in PIO mode 0 - most relaxed timings */
	pio_mode = 0;
	set_pcmcia_timing (pio_mode);
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#endif /* CONFIG_IDE_8xx_DIRECT */
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	/*
	 * Wait for IDE to get ready.
	 * According to spec, this can take up to 31 seconds!
	 */
627 628
	for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
		int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
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630 631 632 633 634 635 636
#ifdef CONFIG_IDE_8xx_PCCARD
		/* Skip non-ide devices from probing */
		if ((ide_devices_found & (1 << bus)) == 0) {
			ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
			continue;
		}
#endif
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		printf ("Bus %d: ", bus);

		ide_bus_ok[bus] = 0;

		/* Select device
		 */
		udelay (100000);		/* 100 ms */
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		ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
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		udelay (100000);		/* 100 ms */
		i = 0;
		do {
			udelay (10000);		/* 10 ms */

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			c = ide_inb (dev, ATA_STATUS);
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			i++;
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#if defined(CONFIG_SC3)
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			if (i > (ata_reset_time * 100)) {
#else
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			if (i > (ATA_RESET_TIME * 100)) {
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#endif
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				puts ("** Timeout **\n");
				ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
				return;
			}
			if ((i >= 100) && ((i%100)==0)) {
				putc ('.');
			}
		} while (c & ATA_STAT_BUSY);

		if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
			puts ("not available  ");
668
			debug ("Status = 0x%02X ", c);
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#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
		} else  if ((c & ATA_STAT_READY) == 0) {
			puts ("not available  ");
672
			debug ("Status = 0x%02X ", c);
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#endif
		} else {
			puts ("OK ");
			ide_bus_ok[bus] = 1;
		}
		WATCHDOG_RESET();
	}
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	putc ('\n');

	ide_led ((LED_IDE1 | LED_IDE2), 0);	/* LED's off	*/

	curr_device = -1;
686
	for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
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#ifdef CONFIG_IDE_LED
		int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
#endif
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		ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
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		ide_dev_desc[i].if_type=IF_TYPE_IDE;
		ide_dev_desc[i].dev=i;
		ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
		ide_dev_desc[i].blksz=0;
		ide_dev_desc[i].lba=0;
		ide_dev_desc[i].block_read=ide_read;
		if (!ide_bus_ok[IDE_BUS(i)])
			continue;
		ide_led (led, 1);		/* LED on	*/
		ide_ident(&ide_dev_desc[i]);
		ide_led (led, 0);		/* LED off	*/
		dev_print(&ide_dev_desc[i]);
/*		ide_print (i); */
		if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
			init_part (&ide_dev_desc[i]);			/* initialize partition type */
			if (curr_device < 0)
				curr_device = i;
		}
	}
	WATCHDOG_RESET();
}

/* ------------------------------------------------------------------------- */

block_dev_desc_t * ide_get_dev(int dev)
{
717
	return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
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}


#ifdef CONFIG_IDE_8xx_DIRECT

static void
set_pcmcia_timing (int pmode)
{
726
	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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	volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
	ulong timings;

730
	debug ("Set timing for PIO Mode %d\n", pmode);
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	timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
		| PCMCIA_SST(pio_config_clk[pmode].t_setup)
		| PCMCIA_SL (pio_config_clk[pmode].t_length)
		;

	/* IDE 0
	 */
739 740 741
	pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
	pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
#if (CONFIG_SYS_PCMCIA_POR0 != 0)
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			| timings
#endif
			;
745
	debug ("PBR0: %08x  POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
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747 748 749
	pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
	pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
#if (CONFIG_SYS_PCMCIA_POR1 != 0)
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			| timings
#endif
			;
753
	debug ("PBR1: %08x  POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
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755 756 757
	pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
	pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
#if (CONFIG_SYS_PCMCIA_POR2 != 0)
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			| timings
#endif
			;
761
	debug ("PBR2: %08x  POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
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763 764 765
	pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
	pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
#if (CONFIG_SYS_PCMCIA_POR3 != 0)
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			| timings
#endif
			;
769
	debug ("PBR3: %08x  POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
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	/* IDE 1
	 */
773 774 775
	pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
	pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
#if (CONFIG_SYS_PCMCIA_POR4 != 0)
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			| timings
#endif
			;
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	debug ("PBR4: %08x  POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
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	pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
	pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
#if (CONFIG_SYS_PCMCIA_POR5 != 0)
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			| timings
#endif
			;
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	debug ("PBR5: %08x  POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
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	pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
	pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
#if (CONFIG_SYS_PCMCIA_POR6 != 0)
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			| timings
#endif
			;
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	debug ("PBR6: %08x  POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
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797 798 799
	pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
	pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
#if (CONFIG_SYS_PCMCIA_POR7 != 0)
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			| timings
#endif
			;
803
	debug ("PBR7: %08x  POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
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}

#endif	/* CONFIG_IDE_8xx_DIRECT */

/* ------------------------------------------------------------------------- */

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/* We only need to swap data if we are running on a big endian cpu. */
/* But Au1x00 cpu:s already swaps data in big endian mode! */
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#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
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#define input_swap_data(x,y,z) input_data(x,y,z)
#else
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static void
input_swap_data(int dev, ulong *sect_buf, int words)
{
819
#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
820 821 822 823 824 825 826 827 828 829 830 831
	uchar i;
	volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
	volatile uchar *pbuf_odd  = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
	ushort  *dbuf = (ushort *)sect_buf;

	while (words--) {
		for (i=0; i<2; i++) {
			*(((uchar *)(dbuf)) + 1) = *pbuf_even;
			*(uchar *)dbuf = *pbuf_odd;
			dbuf+=1;
		}
	}
832
#else
833 834 835 836 837 838
	volatile ushort	*pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
	ushort	*dbuf = (ushort *)sect_buf;

	debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);

	while (words--) {
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#ifdef __MIPS__
		*dbuf++ = swab16p((u16*)pbuf);
		*dbuf++ = swab16p((u16*)pbuf);
842 843 844
#elif defined(CONFIG_PCS440EP)
		*dbuf++ = *pbuf;
		*dbuf++ = *pbuf;
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#else
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		*dbuf++ = ld_le16(pbuf);
		*dbuf++ = ld_le16(pbuf);
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#endif /* !MIPS */
849 850
	}
#endif
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}
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#endif	/* __LITTLE_ENDIAN || CONFIG_AU1X00 */
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#if defined(CONFIG_IDE_SWAP_IO)
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static void
output_data(int dev, ulong *sect_buf, int words)
{
859
#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
860 861 862 863 864 865 866 867
	uchar	*dbuf;
	volatile uchar	*pbuf_even;
	volatile uchar	*pbuf_odd;

	pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
	pbuf_odd  = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
	dbuf = (uchar *)sect_buf;
	while (words--) {
868
		EIEIO;
869
		*pbuf_even = *dbuf++;
870
		EIEIO;
871
		*pbuf_odd = *dbuf++;
872
		EIEIO;
873
		*pbuf_even = *dbuf++;
874
		EIEIO;
875 876
		*pbuf_odd = *dbuf++;
	}
877 878 879 880 881 882 883
#else
	ushort	*dbuf;
	volatile ushort	*pbuf;

	pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
	dbuf = (ushort *)sect_buf;
	while (words--) {
884 885 886 887 888 889 890
#if defined(CONFIG_PCS440EP)
		/* not tested, because CF was write protected */
		EIEIO;
		*pbuf = ld_le16(dbuf++);
		EIEIO;
		*pbuf = ld_le16(dbuf++);
#else
891 892 893 894
		EIEIO;
		*pbuf = *dbuf++;
		EIEIO;
		*pbuf = *dbuf++;
895
#endif
896 897
	}
#endif
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}
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#else	/* ! CONFIG_IDE_SWAP_IO */
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static void
output_data(int dev, ulong *sect_buf, int words)
{
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	outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
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}
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#endif	/* CONFIG_IDE_SWAP_IO */
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#if defined(CONFIG_IDE_SWAP_IO)
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static void
input_data(int dev, ulong *sect_buf, int words)
{
911
#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
912 913 914 915 916 917 918 919
	uchar	*dbuf;
	volatile uchar	*pbuf_even;
	volatile uchar	*pbuf_odd;

	pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
	pbuf_odd  = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
	dbuf = (uchar *)sect_buf;
	while (words--) {
920
		*dbuf++ = *pbuf_even;
921
		EIEIO;
922 923
		SYNC;
		*dbuf++ = *pbuf_odd;
924
		EIEIO;
925
		SYNC;
926
		*dbuf++ = *pbuf_even;
927
		EIEIO;
928
		SYNC;
929
		*dbuf++ = *pbuf_odd;
930
		EIEIO;
931 932 933 934 935 936 937 938 939 940 941 942
		SYNC;
	}
#else
	ushort	*dbuf;
	volatile ushort	*pbuf;

	pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
	dbuf = (ushort *)sect_buf;

	debug("in input data base for read is %lx\n", (unsigned long) pbuf);

	while (words--) {
943 944 945 946 947 948
#if defined(CONFIG_PCS440EP)
		EIEIO;
		*dbuf++ = ld_le16(pbuf);
		EIEIO;
		*dbuf++ = ld_le16(pbuf);
#else
949
		EIEIO;
950
		*dbuf++ = *pbuf;
951
		EIEIO;
952
		*dbuf++ = *pbuf;
953
#endif
954
	}
955
#endif
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}
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#else	/* ! CONFIG_IDE_SWAP_IO */
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static void
input_data(int dev, ulong *sect_buf, int words)
{
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	insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
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}

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#endif	/* CONFIG_IDE_SWAP_IO */
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/* -------------------------------------------------------------------------
 */
static void ide_ident (block_dev_desc_t *dev_desc)
{
	ulong iobuf[ATA_SECTORWORDS];
	unsigned char c;
	hd_driveid_t *iop = (hd_driveid_t *)iobuf;

974 975
#ifdef CONFIG_ATAPI
	int retries = 0;
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	int do_retry = 0;
#endif

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#ifdef CONFIG_TUNE_PIO
	int pio_mode;
#endif

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#if 0
	int mode, cycle_time;
#endif
	int device;
	device=dev_desc->dev;
	printf ("  Device %d: ", device);

	ide_led (DEVICE_LED(device), 1);	/* LED on	*/
	/* Select device
	 */
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	ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
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	dev_desc->if_type=IF_TYPE_IDE;
#ifdef CONFIG_ATAPI
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    do_retry = 0;
    retries = 0;

    /* Warning: This will be tricky to read */
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    while (retries <= 1) {
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	/* check signature */
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	if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
		 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
		 (ide_inb(device,ATA_CYL_LOW)  == 0x14) &&
		 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
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		/* ATAPI Signature found */
		dev_desc->if_type=IF_TYPE_ATAPI;
		/* Start Ident Command
		 */
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		ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
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		/*
		 * Wait for completion - ATAPI devices need more time
		 * to become ready
		 */
		c = ide_wait (device, ATAPI_TIME_OUT);
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	} else
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#endif
	{
		/* Start Ident Command
		 */
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		ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
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		/* Wait for completion
		 */
		c = ide_wait (device, IDE_TIME_OUT);
	}
	ide_led (DEVICE_LED(device), 0);	/* LED off	*/

	if (((c & ATA_STAT_DRQ) == 0) ||
	    ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
1032
#ifdef CONFIG_ATAPI
1033 1034 1035 1036 1037 1038 1039 1040
		{
			/* Need to soft reset the device in case it's an ATAPI...  */
			debug ("Retrying...\n");
			ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
			udelay(100000);
			ide_outb (device, ATA_COMMAND, 0x08);
			udelay (500000);	/* 500 ms */
		}
1041 1042
		/* Select device
		 */
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		ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
		retries++;
1045 1046 1047
#else
		return;
#endif
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	}
1049 1050 1051
#ifdef CONFIG_ATAPI
	else
		break;
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    }	/* see above - ugly to read */
1053 1054 1055 1056

	if (retries == 2) /* Not found */
		return;
#endif
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	input_swap_data (device, iobuf, ATA_SECTORWORDS);

1060 1061 1062
	ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
	ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
	ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
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#ifdef __LITTLE_ENDIAN
	/*
1065 1066
	 * firmware revision, model, and serial number have Big Endian Byte
	 * order in Word. Convert all three to little endian.
W
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1067 1068
	 *
	 * See CF+ and CompactFlash Specification Revision 2.0:
1069
	 * 6.2.1.6: Identify Drive, Table 39 for more details
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1070 1071 1072 1073
	 */

	strswab (dev_desc->revision);
	strswab (dev_desc->vendor);
1074
	strswab (dev_desc->product);
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1075
#endif /* __LITTLE_ENDIAN */
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1076 1077 1078 1079 1080 1081

	if ((iop->config & 0x0080)==0x0080)
		dev_desc->removable = 1;
	else
		dev_desc->removable = 0;

1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113
#ifdef CONFIG_TUNE_PIO
	/* Mode 0 - 2 only, are directly determined by word 51. */
	pio_mode = iop->tPIO;
	if (pio_mode > 2) {
		printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
		pio_mode = 0; /* Force it to dead slow, and hope for the best... */
	}

	/* Any CompactFlash Storage Card that supports PIO mode 3 or above
	 * shall set bit 1 of word 53 to one and support the fields contained
	 * in words 64 through 70.
	 */
	if (iop->field_valid & 0x02) {
		/* Mode 3 and above are possible.  Check in order from slow
		 * to fast, so we wind up with the highest mode allowed.
		 */
		if (iop->eide_pio_modes & 0x01)
			pio_mode = 3;
		if (iop->eide_pio_modes & 0x02)
			pio_mode = 4;
		if (ata_id_is_cfa((u16 *)iop)) {
			if ((iop->cf_advanced_caps & 0x07) == 0x01)
				pio_mode = 5;
			if ((iop->cf_advanced_caps & 0x07) == 0x02)
				pio_mode = 6;
		}
	}

	/* System-specific, depends on bus speeds, etc. */
	ide_set_piomode(pio_mode);
#endif /* CONFIG_TUNE_PIO */

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1114 1115 1116 1117 1118 1119 1120 1121 1122
#if 0
	/*
	 * Drive PIO mode autoselection
	 */
	mode = iop->tPIO;

	printf ("tPIO = 0x%02x = %d\n",mode, mode);
	if (mode > 2) {		/* 2 is maximum allowed tPIO value */
		mode = 2;
1123
		debug ("Override tPIO -> 2\n");
W
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1124 1125
	}
	if (iop->field_valid & 2) {	/* drive implements ATA2? */
1126
		debug ("Drive implements ATA2\n");
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1127 1128 1129 1130 1131
		if (iop->capability & 8) {	/* drive supports use_iordy? */
			cycle_time = iop->eide_pio_iordy;
		} else {
			cycle_time = iop->eide_pio;
		}
1132
		debug ("cycle time = %d\n", cycle_time);
W
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1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148
		mode = 4;
		if (cycle_time > 120) mode = 3;	/* 120 ns for PIO mode 4 */
		if (cycle_time > 180) mode = 2;	/* 180 ns for PIO mode 3 */
		if (cycle_time > 240) mode = 1;	/* 240 ns for PIO mode 4 */
		if (cycle_time > 383) mode = 0;	/* 383 ns for PIO mode 4 */
	}
	printf ("PIO mode to use: PIO %d\n", mode);
#endif /* 0 */

#ifdef CONFIG_ATAPI
	if (dev_desc->if_type==IF_TYPE_ATAPI) {
		atapi_inquiry(dev_desc);
		return;
	}
#endif /* CONFIG_ATAPI */

W
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1149
#ifdef __BIG_ENDIAN
W
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1150 1151
	/* swap shorts */
	dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
W
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1152 1153 1154 1155 1156 1157 1158 1159 1160
#else	/* ! __BIG_ENDIAN */
	/*
	 * do not swap shorts on little endian
	 *
	 * See CF+ and CompactFlash Specification Revision 2.0:
	 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
	 */
	dev_desc->lba = iop->lba_capacity;
#endif	/* __BIG_ENDIAN */
W
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1161

1162
#ifdef CONFIG_LBA48
W
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1163
	if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
W
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1164 1165
		dev_desc->lba48 = 1;
		dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
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1166 1167 1168 1169 1170 1171 1172
						  ((unsigned long long)iop->lba48_capacity[1] << 16) |
						  ((unsigned long long)iop->lba48_capacity[2] << 32) |
						  ((unsigned long long)iop->lba48_capacity[3] << 48);
	} else {
		dev_desc->lba48 = 0;
	}
#endif /* CONFIG_LBA48 */
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1173 1174 1175 1176 1177
	/* assuming HD */
	dev_desc->type=DEV_TYPE_HARDDISK;
	dev_desc->blksz=ATA_BLOCKSIZE;
	dev_desc->lun=0; /* just to fill something in... */

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1178
#if 0	/* only used to test the powersaving mode,
W
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1179 1180
	 * if enabled, the drive goes after 5 sec
	 * in standby mode */
W
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1181
	ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
W
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1182
	c = ide_wait (device, IDE_TIME_OUT);
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1183 1184 1185 1186
	ide_outb (device, ATA_SECT_CNT, 1);
	ide_outb (device, ATA_LBA_LOW,  0);
	ide_outb (device, ATA_LBA_MID,  0);
	ide_outb (device, ATA_LBA_HIGH, 0);
1187
	ide_outb (device, ATA_DEV_HD,   ATA_LBA | ATA_DEVICE(device));
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1188
	ide_outb (device, ATA_COMMAND,  0xe3);
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1189 1190 1191 1192 1193 1194 1195 1196
	udelay (50);
	c = ide_wait (device, IDE_TIME_OUT);	/* can't take over 500 ms */
#endif
}


/* ------------------------------------------------------------------------- */

1197
ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
W
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1198 1199 1200 1201
{
	ulong n = 0;
	unsigned char c;
	unsigned char pwrsave=0; /* power save */
1202
#ifdef CONFIG_LBA48
W
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1203
	unsigned char lba48 = 0;
W
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1204

1205
	if (blknr & 0x0000fffff0000000ULL) {
W
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1206 1207 1208 1209
		/* more than 28 bits used, use 48bit mode */
		lba48 = 1;
	}
#endif
1210
	debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
W
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1211 1212 1213 1214 1215 1216
		device, blknr, blkcnt, (ulong)buffer);

	ide_led (DEVICE_LED(device), 1);	/* LED on	*/

	/* Select device
	 */
W
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1217
	ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
W
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1218 1219 1220 1221 1222 1223 1224 1225 1226
	c = ide_wait (device, IDE_TIME_OUT);

	if (c & ATA_STAT_BUSY) {
		printf ("IDE read: device %d not ready\n", device);
		goto IDE_READ_E;
	}

	/* first check if the drive is in Powersaving mode, if yes,
	 * increase the timeout value */
W
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1227
	ide_outb (device, ATA_COMMAND,  ATA_CMD_CHK_PWR);
W
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1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238
	udelay (50);

	c = ide_wait (device, IDE_TIME_OUT);	/* can't take over 500 ms */

	if (c & ATA_STAT_BUSY) {
		printf ("IDE read: device %d not ready\n", device);
		goto IDE_READ_E;
	}
	if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
		printf ("No Powersaving mode %X\n", c);
	} else {
W
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1239
		c = ide_inb(device,ATA_SECT_CNT);
1240
		debug ("Powersaving %02X\n",c);
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1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253
		if(c==0)
			pwrsave=1;
	}


	while (blkcnt-- > 0) {

		c = ide_wait (device, IDE_TIME_OUT);

		if (c & ATA_STAT_BUSY) {
			printf ("IDE read: device %d not ready\n", device);
			break;
		}
1254
#ifdef CONFIG_LBA48
W
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1255 1256 1257 1258
		if (lba48) {
			/* write high bits */
			ide_outb (device, ATA_SECT_CNT, 0);
			ide_outb (device, ATA_LBA_LOW,	(blknr >> 24) & 0xFF);
1259
#ifdef CONFIG_SYS_64BIT_LBA
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1260 1261
			ide_outb (device, ATA_LBA_MID,	(blknr >> 32) & 0xFF);
			ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1262 1263 1264 1265
#else
			ide_outb (device, ATA_LBA_MID,	0);
			ide_outb (device, ATA_LBA_HIGH, 0);
#endif
W
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1266 1267
		}
#endif
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1268 1269 1270 1271
		ide_outb (device, ATA_SECT_CNT, 1);
		ide_outb (device, ATA_LBA_LOW,  (blknr >>  0) & 0xFF);
		ide_outb (device, ATA_LBA_MID,  (blknr >>  8) & 0xFF);
		ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
W
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1272

1273
#ifdef CONFIG_LBA48
W
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1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285
		if (lba48) {
			ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
			ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);

		} else
#endif
		{
			ide_outb (device, ATA_DEV_HD,   ATA_LBA		|
						    ATA_DEVICE(device)	|
						    ((blknr >> 24) & 0xF) );
			ide_outb (device, ATA_COMMAND,  ATA_CMD_READ);
		}
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1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296

		udelay (50);

		if(pwrsave) {
			c = ide_wait (device, IDE_SPIN_UP_TIME_OUT);	/* may take up to 4 sec */
			pwrsave=0;
		} else {
			c = ide_wait (device, IDE_TIME_OUT);	/* can't take over 500 ms */
		}

		if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1297
#if defined(CONFIG_SYS_64BIT_LBA)
1298
			printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
W
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1299
				device, blknr, c);
W
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1300 1301 1302 1303
#else
			printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
				device, (ulong)blknr, c);
#endif
W
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1304 1305 1306 1307
			break;
		}

		input_data (device, buffer, ATA_SECTORWORDS);
W
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1308
		(void) ide_inb (device, ATA_STATUS);	/* clear IRQ */
W
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1309 1310 1311

		++n;
		++blknr;
1312
		buffer += ATA_BLOCKSIZE;
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1313 1314 1315 1316 1317 1318 1319 1320 1321
	}
IDE_READ_E:
	ide_led (DEVICE_LED(device), 0);	/* LED off	*/
	return (n);
}

/* ------------------------------------------------------------------------- */


1322
ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
W
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1323 1324 1325
{
	ulong n = 0;
	unsigned char c;
1326
#ifdef CONFIG_LBA48
W
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1327 1328
	unsigned char lba48 = 0;

1329
	if (blknr & 0x0000fffff0000000ULL) {
W
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1330 1331 1332 1333
		/* more than 28 bits used, use 48bit mode */
		lba48 = 1;
	}
#endif
W
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1334 1335 1336 1337 1338

	ide_led (DEVICE_LED(device), 1);	/* LED on	*/

	/* Select device
	 */
W
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1339
	ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
W
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1340 1341 1342 1343 1344 1345 1346 1347 1348

	while (blkcnt-- > 0) {

		c = ide_wait (device, IDE_TIME_OUT);

		if (c & ATA_STAT_BUSY) {
			printf ("IDE read: device %d not ready\n", device);
			goto WR_OUT;
		}
1349
#ifdef CONFIG_LBA48
W
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1350 1351 1352 1353
		if (lba48) {
			/* write high bits */
			ide_outb (device, ATA_SECT_CNT, 0);
			ide_outb (device, ATA_LBA_LOW,	(blknr >> 24) & 0xFF);
1354
#ifdef CONFIG_SYS_64BIT_LBA
W
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1355 1356
			ide_outb (device, ATA_LBA_MID,	(blknr >> 32) & 0xFF);
			ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1357 1358 1359 1360
#else
			ide_outb (device, ATA_LBA_MID,	0);
			ide_outb (device, ATA_LBA_HIGH, 0);
#endif
W
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1361 1362
		}
#endif
W
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1363 1364 1365 1366
		ide_outb (device, ATA_SECT_CNT, 1);
		ide_outb (device, ATA_LBA_LOW,  (blknr >>  0) & 0xFF);
		ide_outb (device, ATA_LBA_MID,  (blknr >>  8) & 0xFF);
		ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
W
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1367

1368
#ifdef CONFIG_LBA48
W
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1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380
		if (lba48) {
			ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
			ide_outb (device, ATA_COMMAND,	ATA_CMD_WRITE_EXT);

		} else
#endif
		{
			ide_outb (device, ATA_DEV_HD,   ATA_LBA		|
						    ATA_DEVICE(device)	|
						    ((blknr >> 24) & 0xF) );
			ide_outb (device, ATA_COMMAND,  ATA_CMD_WRITE);
		}
W
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1381 1382 1383 1384 1385 1386

		udelay (50);

		c = ide_wait (device, IDE_TIME_OUT);	/* can't take over 500 ms */

		if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
1387
#if defined(CONFIG_SYS_64BIT_LBA)
1388
			printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
W
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1389
				device, blknr, c);
W
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1390 1391 1392 1393
#else
			printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
				device, (ulong)blknr, c);
#endif
W
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1394 1395 1396 1397
			goto WR_OUT;
		}

		output_data (device, buffer, ATA_SECTORWORDS);
W
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1398
		c = ide_inb (device, ATA_STATUS);	/* clear IRQ */
W
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1399 1400
		++n;
		++blknr;
1401
		buffer += ATA_BLOCKSIZE;
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1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412
	}
WR_OUT:
	ide_led (DEVICE_LED(device), 0);	/* LED off	*/
	return (n);
}

/* ------------------------------------------------------------------------- */

/*
 * copy src to dest, skipping leading and trailing blanks and null
 * terminate the string
W
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1413
 * "len" is the size of available memory including the terminating '\0'
W
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1414
 */
W
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1415
static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
W
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1416
{
W
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1417 1418 1419
	unsigned char *end, *last;

	last = dst;
1420
	end  = src + len - 1;
W
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1421 1422 1423 1424

	/* reserve space for '\0' */
	if (len < 2)
		goto OUT;
1425

W
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1426 1427 1428 1429 1430 1431 1432 1433 1434
	/* skip leading white space */
	while ((*src) && (src<end) && (*src==' '))
		++src;

	/* copy string, omitting trailing white space */
	while ((*src) && (src<end)) {
		*dst++ = *src;
		if (*src++ != ' ')
			last = dst;
W
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1435
	}
W
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1436 1437
OUT:
	*last = '\0';
W
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1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450
}

/* ------------------------------------------------------------------------- */

/*
 * Wait until Busy bit is off, or timeout (in ms)
 * Return last status
 */
static uchar ide_wait (int dev, ulong t)
{
	ulong delay = 10 * t;		/* poll every 100 us */
	uchar c;

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1451
	while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
W
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1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466
		udelay (100);
		if (delay-- == 0) {
			break;
		}
	}
	return (c);
}

/* ------------------------------------------------------------------------- */

#ifdef CONFIG_IDE_RESET
extern void ide_set_reset(int idereset);

static void ide_reset (void)
{
1467 1468
#if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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1469 1470 1471 1472
#endif
	int i;

	curr_device = -1;
1473
	for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
W
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1474
		ide_bus_ok[i] = 0;
1475
	for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
W
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1476 1477 1478 1479
		ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;

	ide_set_reset (1); /* assert reset */

M
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1480 1481 1482
	/* the reset signal shall be asserted for et least 25 us */
	udelay(25);

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1483 1484
	WATCHDOG_RESET();

1485 1486 1487 1488 1489
#ifdef CONFIG_SYS_PB_12V_ENABLE
	immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);	/* 12V Enable output OFF */
	immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
	immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
	immr->im_cpm.cp_pbdir |=   CONFIG_SYS_PB_12V_ENABLE;
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1490 1491 1492 1493 1494 1495 1496

	/* wait 500 ms for the voltage to stabilize
	 */
	for (i=0; i<500; ++i) {
		udelay (1000);
	}

1497 1498
	immr->im_cpm.cp_pbdat |=   CONFIG_SYS_PB_12V_ENABLE;	/* 12V Enable output ON */
#endif	/* CONFIG_SYS_PB_12V_ENABLE */
W
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1499

1500
#ifdef CONFIG_SYS_PB_IDE_MOTOR
W
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1501
	/* configure IDE Motor voltage monitor pin as input */
1502 1503 1504
	immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
	immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
	immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
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1505 1506 1507 1508

	/* wait up to 1 s for the motor voltage to stabilize
	 */
	for (i=0; i<1000; ++i) {
1509
		if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
W
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1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525
			break;
		}
		udelay (1000);
	}

	if (i == 1000) {	/* Timeout */
		printf ("\nWarning: 5V for IDE Motor missing\n");
# ifdef CONFIG_STATUS_LED
#  ifdef STATUS_LED_YELLOW
		status_led_set  (STATUS_LED_YELLOW, STATUS_LED_ON );
#  endif
#  ifdef STATUS_LED_GREEN
		status_led_set  (STATUS_LED_GREEN,  STATUS_LED_OFF);
#  endif
# endif	/* CONFIG_STATUS_LED */
	}
1526
#endif	/* CONFIG_SYS_PB_IDE_MOTOR */
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1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542

	WATCHDOG_RESET();

	/* de-assert RESET signal */
	ide_set_reset(0);

	/* wait 250 ms */
	for (i=0; i<250; ++i) {
		udelay (1000);
	}
}

#endif	/* CONFIG_IDE_RESET */

/* ------------------------------------------------------------------------- */

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1543 1544 1545 1546 1547
#if defined(CONFIG_IDE_LED)	&& \
   !defined(CONFIG_CPC45)	&& \
   !defined(CONFIG_HMI10)	&& \
   !defined(CONFIG_KUP4K)	&& \
   !defined(CONFIG_KUP4X)
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1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565

static	uchar	led_buffer = 0;		/* Buffer for current LED status	*/

static void ide_led (uchar led, uchar status)
{
	uchar *led_port = LED_PORT;

	if (status)	{		/* switch LED on	*/
		led_buffer |=  led;
	} else {			/* switch LED off	*/
		led_buffer &= ~led;
	}

	*led_port = led_buffer;
}

#endif	/* CONFIG_IDE_LED */

1566 1567 1568 1569 1570 1571 1572 1573
#if defined(CONFIG_OF_IDE_FIXUP)
int ide_device_present(int dev)
{
	if (dev >= CONFIG_SYS_IDE_MAXBUS)
		return 0;
	return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
}
#endif
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/* ------------------------------------------------------------------------- */

#ifdef CONFIG_ATAPI
/****************************************************************************
 * ATAPI Support
 */

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#if defined(CONFIG_IDE_SWAP_IO)
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1582 1583 1584 1585 1586
/* since ATAPI may use commands with not 4 bytes alligned length
 * we have our own transfer functions, 2 bytes alligned */
static void
output_data_shorts(int dev, ushort *sect_buf, int shorts)
{
1587
#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1588 1589 1590 1591 1592 1593 1594
	uchar	*dbuf;
	volatile uchar	*pbuf_even;
	volatile uchar	*pbuf_odd;

	pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
	pbuf_odd  = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
	while (shorts--) {
1595
		EIEIO;
1596
		*pbuf_even = *dbuf++;
1597
		EIEIO;
1598 1599
		*pbuf_odd = *dbuf++;
	}
1600
#else
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1601 1602 1603 1604 1605
	ushort	*dbuf;
	volatile ushort	*pbuf;

	pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
	dbuf = (ushort *)sect_buf;
1606

1607
	debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
1608

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1609
	while (shorts--) {
1610
		EIEIO;
1611
		*pbuf = *dbuf++;
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1612
	}
1613 1614 1615 1616 1617 1618 1619
#endif
}

static void
input_data_shorts(int dev, ushort *sect_buf, int shorts)
{
#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
1620 1621 1622 1623 1624 1625 1626
	uchar	*dbuf;
	volatile uchar	*pbuf_even;
	volatile uchar	*pbuf_odd;

	pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
	pbuf_odd  = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
	while (shorts--) {
1627
		EIEIO;
1628
		*dbuf++ = *pbuf_even;
1629
		EIEIO;
1630 1631
		*dbuf++ = *pbuf_odd;
	}
1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645
#else
	ushort	*dbuf;
	volatile ushort	*pbuf;

	pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
	dbuf = (ushort *)sect_buf;

	debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);

	while (shorts--) {
		EIEIO;
		*dbuf++ = *pbuf;
	}
#endif
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}

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1648
#else	/* ! CONFIG_IDE_SWAP_IO */
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1649 1650 1651
static void
output_data_shorts(int dev, ushort *sect_buf, int shorts)
{
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1652
	outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
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1653 1654 1655 1656 1657
}

static void
input_data_shorts(int dev, ushort *sect_buf, int shorts)
{
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	insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
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1659 1660
}

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1661
#endif	/* CONFIG_IDE_SWAP_IO */
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/*
 * Wait until (Status & mask) == res, or timeout (in ms)
 * Return last status
 * This is used since some ATAPI CD ROMs clears their Busy Bit first
 * and then they set their DRQ Bit
 */
static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
{
	ulong delay = 10 * t;		/* poll every 100 us */
	uchar c;

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	c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
	while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
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1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699
		/* break if error occurs (doesn't make sense to wait more) */
		if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
			break;
		udelay (100);
		if (delay-- == 0) {
			break;
		}
	}
	return (c);
}

/*
 * issue an atapi command
 */
unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
{
	unsigned char c,err,mask,res;
	int n;
	ide_led (DEVICE_LED(device), 1);	/* LED on	*/

	/* Select device
	 */
	mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
	res = 0;
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	ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
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1701 1702 1703 1704 1705 1706 1707
	c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
	if ((c & mask) != res) {
		printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
		err=0xFF;
		goto AI_OUT;
	}
	/* write taskfile */
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1708
	ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
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1709 1710
	ide_outb (device, ATA_SECT_CNT, 0);
	ide_outb (device, ATA_SECT_NUM, 0);
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1711
	ide_outb (device, ATA_CYL_LOW,  (unsigned char)(buflen & 0xFF));
W
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1712
	ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
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1713
	ide_outb (device, ATA_DEV_HD,   ATA_LBA | ATA_DEVICE(device));
W
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1714

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1715
	ide_outb (device, ATA_COMMAND,  ATAPI_CMD_PACKET);
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1716 1717 1718 1719 1720 1721 1722
	udelay (50);

	mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
	res = ATA_STAT_DRQ;
	c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);

	if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
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Steven A. Falco 已提交
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		printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
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1724 1725 1726 1727 1728
		err=0xFF;
		goto AI_OUT;
	}

	output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
W
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1729
	/* ATAPI Command written wait for completition */
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1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740
	udelay (5000); /* device must set bsy */

	mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
	/* if no data wait for DRQ = 0 BSY = 0
	 * if data wait for DRQ = 1 BSY = 0 */
	res=0;
	if(buflen)
		res = ATA_STAT_DRQ;
	c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
	if ((c & mask) != res ) {
		if (c & ATA_STAT_ERR) {
W
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1741
			err=(ide_inb(device,ATA_ERROR_REG))>>4;
1742
			debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
W
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1743
		} else {
S
Steven A. Falco 已提交
1744
			printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x)  status 0x%02x\n", ccb[0],c);
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1745 1746 1747 1748
			err=0xFF;
		}
		goto AI_OUT;
	}
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1749
	n=ide_inb(device, ATA_CYL_HIGH);
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1750
	n<<=8;
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1751
	n+=ide_inb(device, ATA_CYL_LOW);
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1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762
	if(n>buflen) {
		printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
		err=0xff;
		goto AI_OUT;
	}
	if((n==0)&&(buflen<0)) {
		printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
		err=0xff;
		goto AI_OUT;
	}
	if(n!=buflen) {
1763
		debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
W
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1764 1765
	}
	if(n!=0) { /* data transfer */
1766
		debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
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1767 1768 1769
		 /* we transfer shorts */
		n>>=1;
		/* ok now decide if it is an in or output */
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1770
		if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1771
			debug ("Write to device\n");
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1772 1773
			output_data_shorts(device,(unsigned short *)buffer,n);
		} else {
1774
			debug ("Read from device @ %p shorts %d\n",buffer,n);
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1775 1776 1777 1778 1779 1780 1781 1782
			input_data_shorts(device,(unsigned short *)buffer,n);
		}
	}
	udelay(5000); /* seems that some CD ROMs need this... */
	mask = ATA_STAT_BUSY|ATA_STAT_ERR;
	res=0;
	c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
	if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
W
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		err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1784
		debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
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1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797
	} else {
		err = 0;
	}
AI_OUT:
	ide_led (DEVICE_LED(device), 0);	/* LED off	*/
	return (err);
}

/*
 * sending the command to atapi_issue. If an status other than good
 * returns, an request_sense will be issued
 */

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#define ATAPI_DRIVE_NOT_READY	100
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1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821
#define ATAPI_UNIT_ATTN		10

unsigned char atapi_issue_autoreq (int device,
				   unsigned char* ccb,
				   int ccblen,
				   unsigned char *buffer,
				   int buflen)
{
	unsigned char sense_data[18],sense_ccb[12];
	unsigned char res,key,asc,ascq;
	int notready,unitattn;

	unitattn=ATAPI_UNIT_ATTN;
	notready=ATAPI_DRIVE_NOT_READY;

retry:
	res= atapi_issue(device,ccb,ccblen,buffer,buflen);
	if (res==0)
		return (0); /* Ok */

	if (res==0xFF)
		return (0xFF); /* error */

1822
	debug ("(auto_req)atapi_issue returned sense key %X\n",res);
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1823 1824 1825 1826

	memset(sense_ccb,0,sizeof(sense_ccb));
	memset(sense_data,0,sizeof(sense_data));
	sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
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1827
	sense_ccb[4]=18; /* allocation Length */
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1828 1829 1830 1831 1832 1833

	res=atapi_issue(device,sense_ccb,12,sense_data,18);
	key=(sense_data[2]&0xF);
	asc=(sense_data[12]);
	ascq=(sense_data[13]);

1834 1835
	debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
	debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
W
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1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860
		sense_data[0],
		key,
		asc,
		ascq);

	if((key==0))
		return 0; /* ok device ready */

	if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
		if(unitattn-->0) {
			udelay(200*1000);
			goto retry;
		}
		printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
		goto error;
	}
	if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
		if (notready-->0) {
			udelay(200*1000);
			goto retry;
		}
		printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
		goto error;
	}
	if(asc==0x3a) {
1861
		debug ("Media not present\n");
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1862 1863
		goto error;
	}
W
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1864

W
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1865 1866
	printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
error:
1867
	debug  ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
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1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889
	return (0xFF);
}


static void	atapi_inquiry(block_dev_desc_t * dev_desc)
{
	unsigned char ccb[12]; /* Command descriptor block */
	unsigned char iobuf[64]; /* temp buf */
	unsigned char c;
	int device;

	device=dev_desc->dev;
	dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
	dev_desc->block_read=atapi_read;

	memset(ccb,0,sizeof(ccb));
	memset(iobuf,0,sizeof(iobuf));

	ccb[0]=ATAPI_CMD_INQUIRY;
	ccb[4]=40; /* allocation Legnth */
	c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);

1890
	debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
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1891 1892 1893 1894
	if (c!=0)
		return;

	/* copy device ident strings */
1895 1896 1897
	ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
	ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
	ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
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1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915

	dev_desc->lun=0;
	dev_desc->lba=0;
	dev_desc->blksz=0;
	dev_desc->type=iobuf[0] & 0x1f;

	if ((iobuf[1]&0x80)==0x80)
		dev_desc->removable = 1;
	else
		dev_desc->removable = 0;

	memset(ccb,0,sizeof(ccb));
	memset(iobuf,0,sizeof(iobuf));
	ccb[0]=ATAPI_CMD_START_STOP;
	ccb[4]=0x03; /* start */

	c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);

1916
	debug ("ATAPI_CMD_START_STOP returned %x\n",c);
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1917 1918 1919 1920 1921 1922 1923
	if (c!=0)
		return;

	memset(ccb,0,sizeof(ccb));
	memset(iobuf,0,sizeof(iobuf));
	c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);

1924
	debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
W
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1925 1926 1927 1928 1929 1930 1931
	if (c!=0)
		return;

	memset(ccb,0,sizeof(ccb));
	memset(iobuf,0,sizeof(iobuf));
	ccb[0]=ATAPI_CMD_READ_CAP;
	c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1932
	debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
W
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1933 1934 1935
	if (c!=0)
		return;

1936
	debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
W
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1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947
		iobuf[0],iobuf[1],iobuf[2],iobuf[3],
		iobuf[4],iobuf[5],iobuf[6],iobuf[7]);

	dev_desc->lba  =((unsigned long)iobuf[0]<<24) +
			((unsigned long)iobuf[1]<<16) +
			((unsigned long)iobuf[2]<< 8) +
			((unsigned long)iobuf[3]);
	dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
			((unsigned long)iobuf[5]<<16) +
			((unsigned long)iobuf[6]<< 8) +
			((unsigned long)iobuf[7]);
1948
#ifdef CONFIG_LBA48
W
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1949
	dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1950
#endif
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1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963
	return;
}


/*
 * atapi_read:
 * we transfer only one block per command, since the multiple DRQ per
 * command is not yet implemented
 */
#define ATAPI_READ_MAX_BYTES	2048	/* we read max 2kbytes */
#define ATAPI_READ_BLOCK_SIZE	2048	/* assuming CD part */
#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE	/* max blocks */

1964
ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
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1965 1966 1967 1968 1969
{
	ulong n = 0;
	unsigned char ccb[12]; /* Command descriptor block */
	ulong cnt;

1970
	debug  ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
W
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1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999
		device, blknr, blkcnt, (ulong)buffer);

	do {
		if (blkcnt>ATAPI_READ_MAX_BLOCK) {
			cnt=ATAPI_READ_MAX_BLOCK;
		} else {
			cnt=blkcnt;
		}
		ccb[0]=ATAPI_CMD_READ_12;
		ccb[1]=0; /* reserved */
		ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
		ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /*  */
		ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
		ccb[5]=(unsigned char)  blknr      & 0xFF; /* LSB Block */
		ccb[6]=(unsigned char) (cnt  >>24) & 0xFF; /* MSB Block count */
		ccb[7]=(unsigned char) (cnt  >>16) & 0xFF;
		ccb[8]=(unsigned char) (cnt  >> 8) & 0xFF;
		ccb[9]=(unsigned char)  cnt	   & 0xFF; /* LSB Block */
		ccb[10]=0; /* reserved */
		ccb[11]=0; /* reserved */

		if (atapi_issue_autoreq(device,ccb,12,
					(unsigned char *)buffer,
					cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
			return (n);
		}
		n+=cnt;
		blkcnt-=cnt;
		blknr+=cnt;
2000
		buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
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2001 2002 2003 2004 2005 2006 2007 2008
	} while (blkcnt > 0);
	return (n);
}

/* ------------------------------------------------------------------------- */

#endif /* CONFIG_ATAPI */

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U_BOOT_CMD(
	ide,  5,  1,  do_ide,
P
Peter Tyser 已提交
2011
	"IDE sub-system",
W
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2012 2013 2014 2015 2016 2017 2018
	"reset - reset IDE controller\n"
	"ide info  - show available IDE devices\n"
	"ide device [dev] - show or set current device\n"
	"ide part [dev] - print partition table of one or all IDE devices\n"
	"ide read  addr blk# cnt\n"
	"ide write addr blk# cnt - read/write `cnt'"
	" blocks starting at block `blk#'\n"
W
Wolfgang Denk 已提交
2019
	"    to/from memory address `addr'"
W
wdenk 已提交
2020 2021
);

W
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2022 2023
U_BOOT_CMD(
	diskboot,	3,	1,	do_diskboot,
P
Peter Tyser 已提交
2024
	"boot from IDE device",
W
Wolfgang Denk 已提交
2025
	"loadAddr dev:part"
W
wdenk 已提交
2026
);