!115 kernel platform目录整改

Merge pull request !115 from SimonLi/master

Makefile

@@ -141,7 +141,7 @@ menuconfig:$(MENUCONFIG_MCONF)
 	$< $(KCONFIG_FILE_PATH)
 
 genconfig:$(MENUCONFIG_CONF)
-	$(HIDE)mkdir -p include/config include/generated
+	$(HIDE)mkdir -p include/config include/generated platform/include
 	$< --olddefconfig $(KCONFIG_FILE_PATH)
 	$< --silentoldconfig $(KCONFIG_FILE_PATH)
 	-mv -f $(LITEOS_MENUCONFIG_H) $(LITEOS_PLATFORM_MENUCONFIG_H)

arch/arm/Kconfig

@@ -75,3 +75,29 @@ config ARCH_CORTEX_A7
 config ARCH_CPU
     string
     default "cortex-a7" if ARCH_CORTEX_A7
+
+#
+# Supported GIC version
+#
+
+choice
+    prompt "GIC version"
+    default ARCH_GIC_V2
+    help
+      Interrupt Controller.
+
+config ARCH_GIC_V2
+    bool "GIC Version 2"
+    help
+      This GIC(General Interrupt Controller) version 2 driver is compatatble with
+      GIC version 1 and version 2.
+
+config ARCH_GIC_V3
+    bool "GIC Version 3"
+    depends on ARCH_ARM_V8A || ARCH_ARM_V8R
+    help
+      General Interrupt Controller version 3.
+
+endchoice
+
+

arch/arm/arm.mk

@@ -42,7 +42,10 @@ LITEOS_ARCH_ARM         :=
 endif
 
 LITEOS_BASELIB          += -l$(LOSCFG_ARCH_CPU)
+LITEOS_BASELIB          += -lgic
+
 LIB_SUBDIRS             += arch/arm/$(LITEOS_ARCH_ARM)
+LIB_SUBDIRS             += arch/arm/gic
 
 # CPU compile options
 ifeq ($(LOSCFG_ARCH_ARM_AARCH64), y)

arch/arm/gic/Makefile

+# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
+# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without modification,
+# are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this list of
+#    conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice, this list
+#    of conditions and the following disclaimer in the documentation and/or other materials
+#    provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its contributors may be used
+#    to endorse or promote products derived from this software without specific prior written
+#    permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+include $(LITEOSTOPDIR)/config.mk
+
+MODULE_NAME := $(notdir $(shell pwd))
+
+# LOCAL_SRCS := $(wildcard *.c)
+
+ifeq ($(LOSCFG_ARCH_GIC_V2), y)
+LOCAL_SRCS := gic_v2.c
+else ifeq ($(LOSCFG_ARCH_GIC_V3), y)
+LOCAL_SRCS := gic_v3.c
+endif
+
+LOCAL_INCLUDE := \
+	-I $(LITEOSTOPDIR)/kernel/base/include \
+	-I $(LITEOSTOPDIR)/arch/arm/include \
+	-I $(LITEOSTOPDIR)/arch/arm/arm/src/include \
+
+LOCAL_FLAGS := $(LOCAL_INCLUDE)
+include $(MODULE)

platform/hw/arm/interrupt/gic/gic_v2.c → arch/arm/gic/gic_v2.c

@@ -30,12 +30,13 @@
  */
 
 #include "gic_common.h"
+#include "los_hwi.h"
 #include "los_hwi_pri.h"
 #include "los_mp.h"
 
 STATIC_ASSERT(OS_USER_HWI_MAX <= 1020, "hwi max is too large!");
 
-#ifdef LOSCFG_PLATFORM_BSP_GIC_V2
+#ifdef LOSCFG_ARCH_GIC_V2
 
 STATIC UINT32 g_curIrqNum = 0;
 

platform/hw/arm/interrupt/gic/gic_v3.c → arch/arm/gic/gic_v3.c

@@ -32,10 +32,11 @@
 #include "gic_common.h"
 #include "gic_v3.h"
 #include "los_typedef.h"
+#include "los_hwi.h"
 #include "los_hwi_pri.h"
 #include "los_mp.h"
 
-#ifdef LOSCFG_PLATFORM_BSP_GIC_V3
+#ifdef LOSCFG_ARCH_GIC_V3
 
 STATIC UINT32 g_curIrqNum = 0;
 

platform/hw/include/gic_common.h → arch/arm/include/gic_common.h

@@ -47,7 +47,7 @@ enum {
 #define GIC_REV_MASK                    0xF0
 #define GIC_REV_OFFSET                  0x4
 
-#ifdef LOSCFG_PLATFORM_BSP_GIC_V2
+#ifdef LOSCFG_ARCH_GIC_V2
 #define GICC_CTLR                       (GICC_OFFSET + 0x00)            /* CPU Interface Control Register */
 #define GICC_PMR                        (GICC_OFFSET + 0x04)            /* Interrupt Priority Mask Register */
 #define GICC_BPR                        (GICC_OFFSET + 0x08)            /* Binary Point Register */
@@ -76,7 +76,7 @@ enum {
 #define GICD_PIDR2V2                    (GICD_OFFSET + 0xfe8)
 #define GICD_PIDR2V3                    (GICD_OFFSET + 0xffe8)
 
-#ifdef LOSCFG_PLATFORM_BSP_GIC_V3
+#ifdef LOSCFG_ARCH_GIC_V3
 #define GICD_IGRPMODR(n)                (GICD_OFFSET + 0x0d00 + (n) * 4) /* Interrupt Group Mode Reisters */
 #define GICD_IROUTER(n)                 (GICD_OFFSET + 0x6000 + (n) * 8) /* Interrupt Rounter Reisters */
 #endif

platform/Kconfig

@@ -74,26 +74,6 @@ config TEE_ENABLE
     help
         ENABLE teeos in platform
 
-choice
-    prompt "IRQCHIP"
-    default PLATFORM_BSP_GIC_V2
-    help
-      Interrupt Controller.
-
-config PLATFORM_BSP_GIC_V2
-    bool "GIC Version 2"
-    help
-      This GIC(General Interrupt Controller) version 2 driver is compatatble with
-      GIC version 1 and version 2.
-
-config PLATFORM_BSP_GIC_V3
-    bool "GIC Version 3"
-    depends on ARCH_ARM_V8A || ARCH_ARM_V8R
-    help
-      General Interrupt Controller version 3.
-
-endchoice
-
 config HRTIMER_ENABLE
     bool "HR TIMER enable"
     default y

platform/Makefile

@@ -31,22 +31,11 @@ include $(LITEOSTOPDIR)/config.mk
 
 MODULE_NAME := bsp
 
-LOCAL_SRCS = $(wildcard $(HWI_SRC)/*.c) \
-            $(wildcard $(TIMER_SRC)/*.c) \
-            $(wildcard $(UART_SRC)/*.c) \
-            $(wildcard ./main.c)
-
-ifeq ($(LOSCFG_HRTIMER_ENABLE), y)
-LOCAL_SRCS += $(wildcard $(HRTIMER_SRC)/*.c)
-endif
+LOCAL_SRCS = $(wildcard ./main.c)
 
 LOCAL_INCLUDE += -I $(LITEOSTOPDIR)/compat/posix/src \
                  -I $(LITEOSTOPDIR)/bsd/dev/random
 
-MAIN_PLATFORMS := $(LOSCFG_PLATFORM_HI3518EV300) \
-                  $(LOSCFG_PLATFORM_HI3516DV300) \
-                  $(LOSCFG_PLATFORM_QEMU_ARM_VIRT_CA7)
-ifeq ($(findstring y, $(MAIN_PLATFORMS)), y)
 LOCAL_SRCS += $(wildcard ../kernel/common/*.c)
 LOCAL_SRCS := $(filter-out ../kernel/common/los_rootfs.c, $(LOCAL_SRCS))
 ifneq ($(LOSCFG_FS_VFS), y)
@@ -55,10 +44,6 @@ endif
 ifneq ($(LOSCFG_BASE_CORE_HILOG), y)
 LOCAL_SRCS := $(filter-out ../kernel/common/los_hilog.c, $(LOCAL_SRCS))
 endif
-else
-LOCAL_SRCS += $(wildcard ../kernel/common/los_config.c)
-LOCAL_SRCS += $(wildcard ../kernel/common/los_printf.c)
-endif
 
 ifeq ($(LOSCFG_KERNEL_TICKLESS), y)
 LOCAL_INCLUDE += -I $(LITEOSTOPDIR)/kernel/extended/include

platform/bsp.mk

@@ -33,45 +33,13 @@ MMU_SRC     :=
 NET_SRC     :=
 TIMER_SRC   :=
 HRTIMER_SRC :=
-UART_SRC    :=
 USB_SRC     :=
 
 ############################# HI3516DV300 Options#################################
-ifeq ($(LOSCFG_PLATFORM_HI3516DV300), y)
-    HWI_TYPE     := arm/interrupt/gic
-    TIMER_TYPE   := arm/timer/arm_generic
-    HRTIMER_TYPE := hisoc/hrtimer
-    NET_TYPE     := hieth
-    UART_TYPE    := amba_pl011
-    USB_TYPE     := usb3.0_hi3516dv300
-    LITEOS_CMACRO_TEST += -DTEST3516DV300
 
 ########################## HI3518EV300 Options##############################
-else ifeq ($(LOSCFG_PLATFORM_HI3518EV300), y)
-    HWI_TYPE     := arm/interrupt/gic
-    TIMER_TYPE   := hisoc/timer
-    HRTIMER_TYPE := hisoc/hrtimer
-    NET_TYPE     := hieth
-    UART_TYPE    := amba_pl011
-    USB_TYPE     := usb3.0_hi3518ev300
-    LITEOS_CMACRO_TEST += -DTEST3518EV300
 
 ########################## Qemu ARM Virt Options##############################
-else ifeq ($(LOSCFG_PLATFORM_QEMU_ARM_VIRT_CA7), y)
-    HWI_TYPE     := arm/interrupt/gic
-    TIMER_TYPE   := arm/timer/arm_generic
-    UART_TYPE    := amba_pl011
-
-endif
-
-ifeq ($(LOSCFG_HRTIMER_ENABLE), y)
-HRTIMER_SRC := hw/$(HRTIMER_TYPE)
-endif
-HWI_SRC     := hw/$(HWI_TYPE)
-TIMER_SRC   := hw/$(TIMER_TYPE)
-NET_SRC     := net/$(NET_TYPE)
-UART_SRC    := uart/$(UART_TYPE)
-USB_SRC     := usb/$(USB_TYPE)
 
 LITEOS_BASELIB       += -lbsp
 
@@ -84,16 +52,7 @@ PLATFORM_INCLUDE := -I $(LITEOSTOPDIR)/../../$(LOSCFG_BOARD_CONFIG_PATH) \
                     -I $(PLATFORM_BSP_BASE)/../kernel/common \
                     -I $(PLATFORM_BSP_BASE)/../../../drivers/liteos/platform/pm \
                     -I $(PLATFORM_BSP_BASE)/hw/include \
-                    -I $(PLATFORM_BSP_BASE)/include \
-                    -I $(PLATFORM_BSP_BASE)/$(UART_SRC)
-
-ifeq ($(LOSCFG_PLATFORM_PATCHFS), y)
-    PLATFORM_INCLUDE += -I $(PLATFORM_BSP_BASE)/../kernel/common/patchfs
-endif
-
-ifeq ($(LOSCFG_FS_ZPFS), y)
-    PLATFORM_INCLUDE += -I $(PLATFORM_BSP_BASE)/../fs/zpfs
-endif
+                    -I $(PLATFORM_BSP_BASE)/include
 
 #
 #-include $(LITEOSTOPDIR)/platform/bsp/board/$(LITEOS_PLATFORM)/board.mk

platform/hw/arm/timer/arm_private/arm_private_timer.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "asm/platform.h"
-#include "los_hwi.h"
-#include "los_sched_pri.h"
-#include "los_tick_pri.h"
-
-#define OS_CYCLE_PER_TICK (TIMER_FREQ / LOSCFG_BASE_CORE_TICK_PER_SECOND)
-
-typedef struct {
-    UINT32 load;        /* Private Timer Load Register */
-    UINT32 count;       /* Private Timer Counter Register */
-    UINT32 control;     /* Private Timer Control Register */
-    UINT32 intStatus;   /* Private Timer Interrupt Status Register */
-} PrivateTimer;
-
-typedef struct {
-    UINT32 low;         /* Global Timer Counter Registers, low bits */
-    UINT32 high;        /* Global Timer Counter Registers, high bits */
-    UINT32 control;     /* Global Timer Control Register */
-    UINT32 intStatus;   /* Global Timer Interrupt Status Register */
-    UINT32 compareLow;  /* Comparator Value Registers, low bits */
-    UINT32 compareHigh; /* Comparator Value Registers, high bits */
-    UINT32 increment;   /* Auto-increment Register */
-} GlobalTimer;
-
-PrivateTimer *g_privateTimer = (PrivateTimer *)PRVTIMER_BASE_ADDR;
-GlobalTimer *g_globalTimer = (GlobalTimer *)GTIMER_BASE_ADDR;
-
-UINT32 HalClockFreqRead(VOID)
-{
-    return TIMER_FREQ;
-}
-
-VOID HalClockFreqWrite(UINT32 freq)
-{
-    PRINT_WARN("private timer does not support setting frequency\n");
-}
-
-VOID HalClockStart(VOID)
-{
-    UINT32 ret = OsSchedSetTickTimerType(32); /* 32 bit tick timer */
-    if (ret != LOS_OK) {
-        return;
-    }
-
-    HalIrqUnmask(PRVTIMER_INT_NUM);
-
-    g_privateTimer->load = OS_CYCLE_PER_TICK;
-    g_privateTimer->control = 0x06; /* IAE bits = 110, not eanbled yet */
-    g_privateTimer->control |= 0x01; /* enable private timer */
-}
-
-VOID OsTickEntry(VOID)
-{
-    OsTickHandler();
-
-    /* clear private timer */
-    g_privateTimer->intStatus = 0x01;
-}
-
-VOID HalClockInit(VOID)
-{
-    UINT32 ret;
-
-    ret =  LOS_HwiCreate(PRVTIMER_INT_NUM, 0xa0, 0, OsTickEntry, NULL);
-    if (ret != LOS_OK) {
-        PRINT_ERR("%s, %d create tick irq failed, ret:0x%x\n", __FUNCTION__, __LINE__, ret);
-    }
-}
-
-UINT64 HalClockGetCycles(VOID)
-{
-    UINT32 low, high;
-
-    do {
-        high = g_globalTimer->high;
-        low = g_globalTimer->low;
-    } while (g_globalTimer->high != high);
-
-    /* combine high and low into 8 bytes cycles */
-    return (((UINT64)high << 32) | low);
-}
-
-VOID HalDelayUs(UINT32 usecs)
-{
-    UINT64 tmo = LOS_CurrNanosec() + usecs * 1000;
-
-    while (LOS_CurrNanosec() < tmo) {
-        __asm__ volatile ("nop");
-    }
-}
-
-UINT64 hi_sched_clock(VOID)
-{
-    return LOS_CurrNanosec();
-}
-
-UINT32 HalClockGetTickTimerCycles(VOID)
-{
-    return g_privateTimer->count;
-}
-
-VOID HalClockTickTimerReload(UINT64 period)
-{
-    HalIrqUnmask(PRVTIMER_INT_NUM);
-
-    /* set control counter regs to defaults */
-    g_privateTimer->load = (UINT32)period;
-    g_privateTimer->control = 0x06; /* IAE bits = 110, not eanbled yet */
-    g_privateTimer->control |= 0x01; /* reenable private timer */
-}

platform/hw/hisoc/hrtimer/hrtimer.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "los_hwi.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-#define TIMER_ENABLE_BIT           7
-#define TIMER_COUNTING_MODE_BIT    6
-#define TIMER_INTERRUPT_ENABLE_BIT 5
-#define TIMER_SIZE_SELECT_BIT      1
-#define TIMER_ONESHOT_BIT          0
-
-VOID HrtimerClockIrqClear(VOID)
-{
-    WRITE_UINT32(0x1, HRTIMER_TIMER_REG_BASE + TIMER_INT_CLR);
-}
-
-VOID HrtimerClockInit(VOID)
-{
-    UINT32 temp;
-
-    /* enable timer here */
-    READ_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-    temp |= HRTIMER_TIMER_ENABLE;
-    WRITE_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-
-    /* disable timer */
-    WRITE_UINT32(0x0, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-
-    /*
-     * Timing mode:oneshot [bit 0 set as 1]
-     * timersize:32bits [bit 1 set as 1]
-     * ticking with 1/1 clock frequency [bit 3 set as 0, bit 2 set as 0]
-     * interrupt enabled [bit 5 set as 1]
-     * timing circulary [bit 6 set as 1]
-     */
-    temp = (1U << TIMER_COUNTING_MODE_BIT) | (1U << TIMER_INTERRUPT_ENABLE_BIT) |
-           (1U << TIMER_SIZE_SELECT_BIT) | (1U << TIMER_ONESHOT_BIT);
-    WRITE_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-}
-
-VOID HrtimerClockStart(UINT32 period)
-{
-    UINT32 temp;
-
-    /* set init value as period */
-    WRITE_UINT32(period, HRTIMER_TIMER_REG_BASE + TIMER_LOAD);
-
-    READ_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-    /* timer enabled [bit 7 set as 1] */
-    temp |= 1U << TIMER_ENABLE_BIT;
-    WRITE_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-}
-
-VOID HrtimerClockStop(VOID)
-{
-    UINT32 temp;
-
-    READ_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-    /* timer disabled [bit 7 set as 0] */
-    temp &= ~(1U << TIMER_ENABLE_BIT);
-    WRITE_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_CONTROL);
-}
-
-UINT32 HrtimerClockValueGet(VOID)
-{
-    UINT32 temp;
-
-    /* Read the current value of the timer3 */
-    READ_UINT32(temp, HRTIMER_TIMER_REG_BASE + TIMER_VALUE);
-    return temp;
-}
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* __cplusplus */

platform/hw/hisoc/timer/timer.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "los_timer_pri.h"
-#include "los_tick_pri.h"
-#include "los_sched_pri.h"
-#include "los_sys_pri.h"
-#include "los_hwi.h"
-#include "los_swtmr.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-STATIC_ASSERT(LOSCFG_KERNEL_SMP != YES, "hisoc timer does not suppot on SMP mode!");
-STATIC_ASSERT(LOSCFG_BASE_CORE_TICK_HW_TIME == YES, "hisoc timer needs to turn on hw time!");
-
-#define TIMER_ENABLE_BIT           7
-#define TIMER_COUNTING_MODE_BIT    6
-#define TIMER_INTERRUPT_ENABLE_BIT 5
-#define TIMER_FREQUENCY_DIV_BIT    3
-#define TIMER_SIZE_SELECT_BIT      1
-#define TIMER_ONESHOT_BIT          0
-
-#define READ_TIMER (*(volatile UINT32 *)(TIMER_TICK_REG_BASE + TIMER_VALUE))
-#define US_PER_MS  1000
-#define MS_PER_S   1000
-
-STATIC UINT32 g_timeStamp __attribute__((section(".data.init")));
-STATIC UINT32 g_lastDec __attribute__((section(".data.init")));
-
-STATIC volatile UINT64 g_schedClockNanosec = 0;
-STATIC volatile UINT64 g_schedClockCycle = 0;
-STATIC volatile UINT32 g_timeClkLast = 0;
-STATIC UINT16 g_swtmrID;
-
-VOID HalClockTickTimerReload(UINT64 period)
-{
-    UINT32 cycle = (UINT32)period;
-    WRITE_UINT32(cycle, TIMER_TICK_REG_BASE + TIMER_LOAD);
-    WRITE_UINT32(cycle, TIMER_TICK_REG_BASE + TIMER_BGLOAD);
-
-    HalClockIrqClear();
-    HalIrqClear(NUM_HAL_INTERRUPT_TIMER);
-}
-
-VOID ResetTimerMasked(VOID)
-{
-    g_lastDec = READ_TIMER;
-    g_timeStamp = 0;
-}
-
-UINT32 GetTimerMasked(VOID)
-{
-    UINT32 now = READ_TIMER;
-
-    if (g_lastDec >= now) {
-        /* not roll back */
-        g_timeStamp += g_lastDec - now;
-    } else {
-        /* rollback */
-        g_timeStamp += g_lastDec + (g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND) - now;
-    }
-
-    g_lastDec = now;
-    return g_timeStamp;
-}
-
-UINT32 TimeClockRead(VOID)
-{
-    UINT32 value;
-
-    READ_UINT32(value, TIMER_TIME_REG_BASE + TIMER_VALUE);
-    value = TIMER_MAXLOAD - value;
-
-    return value;
-}
-
-UINT32 ArchTimerRollback(VOID)
-{
-    UINT32 flag;
-
-    READ_UINT32(flag, TIMER_TICK_REG_BASE + TIMER_RIS);
-    return flag;
-}
-
-/* this func is start timer2 for start time */
-VOID HalClockInitStart(VOID)
-{
-    UINT32 temp;
-    /*
-     * enable timer2 here,
-     * but only time0 is used for system clock.
-     */
-    READ_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-    temp |= TIMER2_ENABLE;
-    WRITE_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-
-    /* init the timestamp and lastdec value */
-    ResetTimerMasked();
-
-    /* disable timer2 */
-    WRITE_UINT32(0x0, TIMER2_REG_BASE + TIMER_CONTROL);
-    /* set init value as period */
-    WRITE_UINT32(TIMER_MAXLOAD, TIMER2_REG_BASE + TIMER_LOAD);
-
-    /*
-     * Timing mode: 32bits [bit 1 set as 1]
-     * ticking with 1/256 clock frequency [bit 3 set as 1, bit 2 set as 0]
-     * timing circulary [bit 6 set as 1]
-     * timer enabled [bit 7 set as 1]
-     */
-    temp = (1U << TIMER_ENABLE_BIT) | (1U << TIMER_COUNTING_MODE_BIT) |
-           (1U << TIMER_FREQUENCY_DIV_BIT) | (1U << TIMER_SIZE_SELECT_BIT);
-    WRITE_UINT32(temp, TIMER2_REG_BASE + TIMER_CONTROL);
-}
-
-UINT32 GetTimer2Value(VOID)
-{
-    UINT32 temp;
-
-    READ_UINT32(temp, TIMER2_REG_BASE + TIMER_VALUE);
-    return temp;
-}
-
-UINT32 HalClockGetTickTimerCycles(VOID)
-{
-    UINT32 temp;
-
-    READ_UINT32(temp, TIMER_TICK_REG_BASE + TIMER_VALUE);
-    return temp;
-}
-
-/* get the system ms clock since the system start */
-UINT32 HiGetMsClock(VOID)
-{
-    const UINT32 t32 = TIMER_MAXLOAD - GetTimer2Value();
-    UINT64 t64 = (UINT64)t32 << 0x8; /* Timer2 is divided by 256, left shift 8 to recover sys clock */
-    UINT64 temp = OS_TIME_TIMER_CLOCK / MS_PER_S;
-
-    return (UINT32)(t64 / temp);
-}
-
-VOID HalClockInit(VOID)
-{
-    UINT32 temp;
-    UINT32 period = g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND;
-    /*
-     * enable time0, timer1 here,
-     * but only time0 is used for system clock.
-     */
-    READ_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-    temp |= TIMER_TICK_ENABLE | TIMER_TIME_ENABLE;
-    WRITE_UINT32(temp, SYS_CTRL_REG_BASE + REG_SC_CTRL);
-
-    /* disable first */
-    WRITE_UINT32(0x0, TIMER_TICK_REG_BASE + TIMER_CONTROL);
-
-    /* set init value as period */
-    WRITE_UINT32(period, TIMER_TICK_REG_BASE + TIMER_LOAD);
-
-    /*
-     * Timing mode: 32bits [bit 1 set as 1]
-     * ticking with 1/1 clock frequency [bit 3 set as 0, bit 2 set as 0]
-     * interrupt enabled [bit 5 set as 1]
-     * timing circulary [bit 6 set as 1]
-     */
-    temp = (1U << 6) | (1U << 5) | (1U << 1);
-    WRITE_UINT32(temp, TIMER_TICK_REG_BASE + TIMER_CONTROL);
-
-    /* init the timestamp and lastdec value */
-    ResetTimerMasked();
-
-    /* disable timer1 */
-    WRITE_UINT32(0x0, TIMER_TIME_REG_BASE + TIMER_CONTROL);
-    /* set init value as period */
-    WRITE_UINT32(0xffffffff, TIMER_TIME_REG_BASE + TIMER_LOAD);
-
-    /*
-     * Timing mode: 32bits [bit 1 set as 1]
-     * ticking with 1/1 clock frequency [bit 3 set as 0, bit 2 set as 0]
-     * timing circulary [bit 6 set as 1]
-     * timer enabled [bit 7 set as 1]
-     */
-    temp = (1U << 7) | (1U << 6) | (1U << 1);
-    WRITE_UINT32(temp, TIMER_TIME_REG_BASE + TIMER_CONTROL);
-
-    (void)LOS_HwiCreate(NUM_HAL_INTERRUPT_TIMER, 0xa0, 0, OsTickHandler, 0);
-}
-
-VOID HalClockIrqClear(VOID)
-{
-    WRITE_UINT32(1, TIMER_TICK_REG_BASE + TIMER_INT_CLR);
-}
-
-VOID HalClockEnable(VOID)
-{
-    UINT32 val;
-    val = GET_UINT32(TIMER_TICK_REG_BASE + TIMER_CONTROL);
-
-    /* timer enabled [bit 7 set as 1] */
-    val |= 1U << TIMER_ENABLE_BIT;
-    WRITE_UINT32(val, TIMER_TICK_REG_BASE + TIMER_CONTROL);
-}
-
-/* Delay for some number of micro-seconds */
-UINT32 GetTimer(UINT32 base)
-{
-    return GetTimerMasked() - base;
-}
-
-VOID HalClockDelayUs(UINT32 usecs)
-{
-    UINT32 tmo = 0;
-    UINT32 tmp;
-    UINT32 intSave = LOS_IntLock();
-
-    /* part of usecs >= 1ms */
-    if (usecs >= US_PER_MS) {
-        tmo = usecs / US_PER_MS; /* start to normalize for usec to cycles per sec */
-        tmo *= (g_sysClock / MS_PER_S); /* largest msecond 1374389 */
-        usecs -= (usecs / US_PER_MS * US_PER_MS); /* get value of usecs < 1ms */
-    }
-
-    /* part of usecs < 1ms */
-    if (usecs) {
-        tmo += (usecs * (g_sysClock / MS_PER_S)) / US_PER_MS;  /* translate us into sys_clock, prevent u32 overflow */
-    }
-
-    /* reset "advancing" timestamp to 0, set lastdec value */
-    ResetTimerMasked();
-
-    tmp = GetTimer(0); /* get current timestamp */
-
-    /* set advancing stamp wake up time */
-    tmo += tmp;
-
-    while (GetTimerMasked() < tmo) {}
-    LOS_IntRestore(intSave);
-}
-
-VOID HalClockFreqWrite(UINT32 freq)
-{
-    PRINT_WARN("hisoc timer does not support setting frequency\n");
-}
-
-STATIC UINT32 UpdateTimeClk(UINT32 *timeClk)
-{
-    UINT32 timeClkNow;
-
-    timeClkNow = TimeClockRead();
-    if (timeClkNow >= g_timeClkLast) {
-        *timeClk = timeClkNow - g_timeClkLast;
-    } else {
-        *timeClk = timeClkNow + (TIMER_MAXLOAD - g_timeClkLast);
-    }
-    return timeClkNow;
-}
-
-VOID UpdateSchedClock(VOID)
-{
-    UINT32 timeClk;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
-    g_timeClkLast = UpdateTimeClk(&timeClk);
-    g_schedClockCycle += (UINT64)timeClk;
-    g_schedClockNanosec += (UINT64)CYCLE_TO_NS(timeClk);
-    OsAdjTime();
-    LOS_IntRestore(intSave);
-}
-
-STATIC UINT64 GetSchedClock(VOID)
-{
-    UINT32 timeClk;
-
-    (VOID)UpdateTimeClk(&timeClk);
-
-    return (g_schedClockNanosec + (UINT64)CYCLE_TO_NS(timeClk));
-}
-
-STATIC UINT64 SchedClock(VOID)
-{
-    UINT32 intSave;
-    UINT64 timeClk64;
-
-    intSave = LOS_IntLock();
-    timeClk64 = GetSchedClock();
-    LOS_IntRestore(intSave);
-
-    return timeClk64;
-}
-
-UINT64 hi_sched_clock(VOID)
-{
-    return SchedClock();
-}
-
-VOID SchedClockSwtmr(VOID)
-{
-    UINT32 ret;
-    ret = LOS_SwtmrCreate(SCHED_CLOCK_INTETRVAL_TICKS, LOS_SWTMR_MODE_PERIOD,
-                          (SWTMR_PROC_FUNC)UpdateSchedClock, &g_swtmrID, 0);
-    if (ret != LOS_OK) {
-        PRINT_ERR("LOS_SwtmrCreate error %u\n", ret);
-        return;
-    }
-    ret = LOS_SwtmrStart(g_swtmrID);
-    if (ret != LOS_OK) {
-        PRINT_ERR("LOS_SwtmrStart error %u\n", ret);
-        return;
-    }
-}
-
-LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID)
-{
-    UINT32 ret = OsSchedSetTickTimerType(32); /* 32 bit tick timer */
-    if (ret != LOS_OK) {
-        return;
-    }
-
-    HalIrqUnmask(NUM_HAL_INTERRUPT_TIMER);
-    HalClockEnable();
-
-    /* start adjusting swtmer */
-    SchedClockSwtmr();
-
-    g_cycle2NsScale = ((double)OS_SYS_NS_PER_SECOND / ((long)OS_TIME_TIMER_CLOCK));
-}
-
-UINT64 HalClockGetCycles(VOID)
-{
-    UINT32 timeClk;
-    UINT32 intSave;
-    UINT64 cycle;
-
-    intSave = LOS_IntLock();
-    (VOID)UpdateTimeClk(&timeClk);
-    cycle = g_schedClockCycle + (UINT64)timeClk;
-    LOS_IntRestore(intSave);
-
-    return cycle;
-}
-
-VOID HalDelayUs(UINT32 usecs)
-{
-    UINT32 tmo = 0;
-    UINT32 tmp;
-    UINT32 intSave = LOS_IntLock();
-
-    /* part of usecs >= 1ms */
-    if (usecs >= US_PER_MS) {
-        tmo = usecs / US_PER_MS; /* start to normalize for usec to cycles per sec */
-        tmo *= (g_sysClock / MS_PER_S); /* largest msecond 1374389 */
-        usecs -= (usecs / US_PER_MS * US_PER_MS); /* get value of usecs < 1ms */
-    }
-
-    /* part of usecs < 1ms */
-    if (usecs) {
-        tmo += (usecs * (g_sysClock / MS_PER_S)) / US_PER_MS;  /* translate us into sys_clock, prevent u32 overflow */
-    }
-
-    /* reset "advancing" timestamp to 0, set lastdec value */
-    ResetTimerMasked();
-
-    tmp = GetTimer(0); /* get current timestamp */
-
-    /* set advancing stamp wake up time */
-    tmo += tmp;
-
-    while (GetTimerMasked() < tmo) {}
-    LOS_IntRestore(intSave);
-}
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* __cplusplus */

platform/uart/amba-pl011-lagacy/uart.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "los_event.h"
-#include "los_task.h"
-#include "hisoc/uart.h"
-#include "los_printf.h"
-EVENT_CB_S g_uartEvent;
-
-#ifdef LOSCFG_PLATFORM_UART_WITHOUT_VFS
-#ifdef LOSCFG_SHELL
-#define UART_BUF    128
-static UINT8    g_uart_buf[UART_BUF];
-extern void shellCmdLineParse(CHAR c, pf_OUTPUT pf_put);
-static channel_data_t smdk_ser_channels[2] = {
-    {(UINT32)UART0_REG_BASE, 1000, NUM_HAL_INTERRUPT_UART0},
-    {(UINT32)UART1_REG_BASE, 1000, NUM_HAL_INTERRUPT_UART1}
-};
-#endif
-#endif
-#ifdef LOSCFG_GDB
-extern int gdb_is_enter(void);
-#endif
-
-UINT8 uart_getc(void)
-{
-    UINT8 ch = 0;
-    UINT32 base = UART_REG_BASE;
-#ifdef LOSCFG_GDB
-    if (gdb_is_enter()) {
-        // nothing to do when using gdb, you can't read from serial.
-    } else {
-#endif
-        UINT32 status;
-        READ_UINT32(status, base + UART_FR);
-        /* Wait until there is data in the FIFO */
-        while (status & 0x10) {
-            READ_UINT32(status, base + UART_FR);
-            (VOID)LOS_TaskDelay(1);
-        }
-
-        READ_UINT8(ch, UART_REG_BASE + UART_DR);
-#ifdef LOSCFG_GDB
-    }
-#endif
-
-    return ch;  /*lint !e438*/
-}   /*lint !e550*/
-
-#if defined(LOSCFG_COREDUMP) || defined(LOSCFG_LLTSER)
-UINT8 uart_getc_interrupt(void)
-{
-    UINT8 ch = 0;
-    UINT32 status;
-    UINT32 base = UART_REG_BASE;
-    READ_UINT32(status, base + UART_FR);
-
-    while (status & 0x10) { /*lint !e40*/
-        READ_UINT32(status, base + UART_FR);
-    }
-    /* receive one char */
-    READ_UINT8(ch, UART_REG_BASE + UART_DR);
-    return ch;
-}
-#endif
-
-#ifdef LOSCFG_GDB
-static char gdb_log_buf[1024 * 8];
-static int gdb_log_buf_write_pos = 0;
-static int gdb_log_buf_read_pos = 0;
-const static int gdb_log_buf_size = sizeof(gdb_log_buf);
-
-#endif
-
-char uart_putc(char c)
-{
-#ifdef LOSCFG_GDB
-    if (gdb_is_enter()) {
-        // if buf full
-        if (((gdb_log_buf_write_pos + 1) % gdb_log_buf_size) == gdb_log_buf_read_pos) {
-            // buffer is full, u can do others
-        } else {
-            // when using gdb, we should save log data temporarily.
-            gdb_log_buf[gdb_log_buf_write_pos] = c;
-            gdb_log_buf_write_pos = (gdb_log_buf_write_pos + 1) % gdb_log_buf_size;
-        }
-    } else {
-#endif
-        UINT32 status = 0;
-
-        /* Wait for Tx FIFO not full */
-        do {
-            READ_UINT32(status, UART_REG_BASE + UART_FR);
-        } while (status & 0x20);
-
-        WRITE_UINT8(c, UART_REG_BASE + UART_DR);
-#ifdef LOSCFG_GDB
-    }
-#endif
-
-    return c;
-}
-
-unsigned int g_uart_fputc_en __attribute__ ((section(".data"))) = 1;
-char uart_fputc(char c, void *f)
-{
-    if (g_uart_fputc_en == 1) {
-        if (c == '\n') {
-            uart_putc('\r'); /*lint !e534*/
-        }
-        return (uart_putc(c));
-    } else {
-        return 0;
-    }
-}
-
-#ifdef LOSCFG_PLATFORM_UART_WITHOUT_VFS
-#ifdef LOSCFG_SHELL
-static void uart_notice_adapt(void)
-{
-    LOS_EventWrite(&g_uartEvent, 0x112);
-}
-void uart_get_raw(void)
-{
-    UINT8 ch;
-    static int cnt_ii = 0;
-    if (cnt_ii == 0) {
-        (VOID)memset_s(g_uart_buf, UART_BUF, 0, UART_BUF);
-    }
-    ch = uart_getc();
-    g_uart_buf[cnt_ii] = ch;
-    cnt_ii++;
-    switch (cnt_ii) {
-        case 1:  // only one char
-            if (ch != 27) { // un special
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-        case 2:
-            if (ch != 91) {
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-        case 3:
-            switch (ch) {
-                default:
-                case 'A':
-                case 'B':
-                case 'C':
-                case 'D':
-                        uart_notice_adapt();
-                        cnt_ii = 0;
-                    break;
-                case 51:
-                case 49:
-                case 52:
-                    break;
-            }
-            break;
-        case 4:
-                uart_notice_adapt();
-                cnt_ii = 0;
-            break;
-
-        default:
-                uart_notice_adapt();
-                cnt_ii = 0;
-            break;
-    }
-}
-extern void dprintf(const char *fmt, ...);
-
-static void uart_irqhandle(void)
-{
-    shellCmdLineParse(0, dprintf);
-    WRITE_UINT32((1 << 4) | (1 << 6), UART_REG_BASE + UART_CLR);
-}
-
-int uart_hwiCreate(void)
-{
-    UINT32 uwRet = 0;
-    if (uwRet != LOS_HwiCreate(NUM_HAL_INTERRUPT_UART, 0xa0, 0, uart_irqhandle, 0)) {
-        return uwRet;
-    }
-    uart_interrupt_unmask();
-    return 0;
-}
-#endif /* LOSCFG_SHELL */
-#endif /* LOSCFG_PLATFORM_UART_WITHOUT_VFS */
-
-void uart_init(void)
-{
-    UINT32 uwBaudRate;
-    UINT32 divider;
-    UINT32 remainder;
-    UINT32 fraction;
-
-#if defined LOSCFG_PLATFORM_HI3519 || defined LOSCFG_PLATFORM_HI3519V101 || defined LOSCFG_PLATFORM_HI3559
-        uart_pin_mux_cfg(CONSOLE_UART);  /*lint !e506*/
-        uart_clk_cfg(CONSOLE_UART, true);  /*lint !e506*/
-#endif
-
-    /* First, disable everything */
-    WRITE_UINT32(0x0, UART_REG_BASE + UART_CR);
-
-    /* set baud rate */
-    uwBaudRate = 16 * CONSOLE_UART_BAUDRATE;
-    divider = CONFIG_UART_CLK_INPUT / uwBaudRate;
-    remainder = CONFIG_UART_CLK_INPUT % uwBaudRate;
-    uwBaudRate = (8 * remainder) / CONSOLE_UART_BAUDRATE;
-    fraction = (uwBaudRate >> 1) + (uwBaudRate & 1);
-
-    WRITE_UINT32(divider, UART_REG_BASE + UART_IBRD);
-    WRITE_UINT32(fraction, UART_REG_BASE + UART_FBRD);
-
-    /* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled. */
-    WRITE_UINT32((3 << 5) | (1 << 4), UART_REG_BASE + UART_LCR_H);
-
-    /* set the fifo threshold of recv interrupt >= 1/8 full */
-    WRITE_UINT32((2 << 3) | (4 << 0), UART_REG_BASE + UART_IFLS);
-
-    /* set nonblock of recv interrupt and recv timeout interrupt */
-    WRITE_UINT32((1 << 4) | (1 << 6), UART_REG_BASE + UART_IMSC);
-    /* enable the UART */
-    WRITE_UINT32((1 << 0) | (1 << 8) | (1 << 9), UART_REG_BASE + UART_CR);
-
-    (VOID)LOS_EventInit(&g_uartEvent);
-}
-
-#ifdef LOSCFG_GDB
-UINT8 gdb_uart_getc(void)
-{
-    UINT8 ch = 0;
-    UINT32 status;
-
-    UINT32 base = UART_REG_BASE;
-    READ_UINT32(status, base + UART_FR);
-
-    /* Wait until there is data in the FIFO */
-    while (status & 0x10) { /*lint !e40*/
-        READ_UINT32(status, base + UART_FR);
-    }
-
-    READ_UINT8(ch, UART_REG_BASE + UART_DR);
-    return ch;  /*lint !e438*/
-}
-
-char gdb_uart_putc(char c)
-{
-    UINT32 status = 0;
-
-    /* Wait for Tx FIFO not full */
-    do {
-        READ_UINT32(status, UART_REG_BASE + UART_FR);
-    } while (status & 0x20);
-
-    WRITE_UINT8(c, UART_REG_BASE + UART_DR);
-    return c;
-}
-
-void gdb_log_flush(void)
-{
-    while (gdb_log_buf_read_pos != gdb_log_buf_write_pos) {
-        gdb_uart_putc(gdb_log_buf[gdb_log_buf_read_pos]);
-        gdb_log_buf_read_pos = (gdb_log_buf_read_pos + 1) % gdb_log_buf_size;
-    }
-}
-
-#endif
-
-void uart_interrupt_unmask(void)
-{
-    HalIrqUnmask(NUM_HAL_INTERRUPT_UART);
-}

platform/uart/amba_pl011/amba_pl011.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "amba_pl011.h"
-#include "los_event.h"
-#include "los_task_pri.h"
-
-EVENT_CB_S g_stShellEvent;
-
-CHAR g_inputCmd[CMD_LENGTH];
-INT32 g_inputIdx = 0;
-#ifdef LOSCFG_QUICK_START
-__attribute__ ((section(".data"))) UINT32 g_uart_fputc_en = 0;
-#else
-__attribute__ ((section(".data"))) UINT32 g_uart_fputc_en = 1;
-#endif
-
-#define REG32(addr) ((volatile UINT32 *)(UINTPTR)(addr))
-#define UARTREG(base, reg)  (*REG32((base) + (reg)))
-#define UART_FR_TXFF (0x1U << 5)
-
-STATIC VOID UartPutcReg(UINTPTR base, CHAR c)
-{
-    /* Spin while fifo is full */
-    while (UARTREG(base, UART_FR) & UART_FR_TXFF) {}
-    UARTREG(base, UART_DR) = c;
-}
-
-STATIC INLINE UINTPTR uart_to_ptr(UINTPTR n)
-{
-    (VOID)n;
-    return UART_REG_BASE;
-}
-
-INT32 uart_putc(INT32 port, CHAR c)
-{
-    UINTPTR base = uart_to_ptr((UINT32)port);
-    UartPutcReg(base, c);
-    return 1;
-}
-
-CHAR uart_fputc(CHAR c, VOID *f)
-{
-    (VOID)f;
-    if (g_uart_fputc_en == 1) {
-        if (c == '\n') {
-            (VOID)uart_putc(0, '\r');
-        }
-        return (uart_putc(0, (c)));
-    } else {
-        return 0;
-    }
-}
-
-LITE_OS_SEC_BSS STATIC SPIN_LOCK_INIT(g_uartOutputSpin);
-
-STATIC VOID UartPutStr(UINTPTR base, const CHAR *s, UINT32 len)
-{
-    UINT32 i;
-
-    for (i = 0; i < len; i++) {
-        if (*(s + i) == '\n') {
-            UartPutcReg(base, '\r');
-        }
-        UartPutcReg(base, *(s + i));
-    }
-}
-
-UINT32 UartPutsReg(UINTPTR base, const CHAR *s, UINT32 len, BOOL isLock)
-{
-    UINT32 intSave;
-
-    if (g_uart_fputc_en == 0) {
-        return 0;
-    }
-
-    if (isLock) {
-        LOS_SpinLockSave(&g_uartOutputSpin, &intSave);
-        UartPutStr(base, s, len);
-        LOS_SpinUnlockRestore(&g_uartOutputSpin, intSave);
-    } else {
-        UartPutStr(base, s, len);
-    }
-
-    return len;
-}
-
-VOID UartPuts(const CHAR *s, UINT32 len, BOOL isLock)
-{
-    UINTPTR base = uart_to_ptr(0);
-    (VOID)UartPutsReg(base, s, len, isLock);
-}
-
-INT32 uart_puts(const CHAR *s, UINTPTR len, VOID *state)
-{
-    (VOID)state;
-    UINTPTR i;
-
-    for (i = 0; i < len; i++) {
-        if (*(s + i) != '\0') {
-            if (*(s + i) == '\n') {
-                (VOID)uart_fputc('\r', NULL);
-            }
-
-            (VOID)uart_fputc(*(s + i), NULL);
-        }
-    }
-
-    return (INT32)len;
-}
-
-VOID uart_handler(VOID)
-{
-    CHAR c;
-    UINTPTR base = uart_to_ptr(0);
-
-    c = UARTREG(base, UART_DR);
-
-    switch (c) {
-        case '\r':
-        case '\n':
-            if (g_inputIdx < CMD_LENGTH - 1) {
-                g_inputCmd[g_inputIdx++] = '\0';
-                LOS_EventWrite(&g_stShellEvent, 0x1);
-                (VOID)uart_putc(0, '\r');
-                (VOID)uart_putc(0, '\n');
-            }
-            break;
-        case 0x8:   /* backspace */
-        case 0x7f:  /* delete */
-            if (g_inputIdx > 0) {
-                g_inputIdx--;
-                (VOID)uart_putc(0, '\b');
-                (VOID)uart_putc(0, ' ');
-                (VOID)uart_putc(0, '\b');
-            }
-            break;
-        default:
-            if (g_inputIdx < CMD_LENGTH - 1) {
-                (VOID)uart_putc(0, c);
-                g_inputCmd[g_inputIdx++] = c;
-            }
-    }
-}
-
-VOID uart_early_init(VOID)
-{
-    /* enable uart transmit */
-    UARTREG(UART_REG_BASE, UART_CR) = (1 << 8) | (1 << 0);
-}
-
-VOID uart_init(VOID)
-{
-    UINT32 ret;
-
-    /* uart interrupt priority should be the highest in interrupt preemption mode */
-    ret = LOS_HwiCreate(NUM_HAL_INTERRUPT_UART, 0, 0, (HWI_PROC_FUNC)uart_handler, NULL);
-    if (ret != LOS_OK) {
-        PRINT_ERR("%s,%d, uart interrupt created error:%x\n", __FUNCTION__, __LINE__, ret);
-    } else {
-        /* clear all irqs */
-        UARTREG(UART_REG_BASE, UART_ICR) = 0x3ff;
-
-        /* set fifo trigger level */
-        UARTREG(UART_REG_BASE, UART_IFLS) = 0;
-
-        /* enable rx interrupt */
-        UARTREG(UART_REG_BASE, UART_IMSC) = (1 << 4 | 1 << 6);
-
-        /* enable receive */
-        UARTREG(UART_REG_BASE, UART_CR) |= (1 << 9);
-
-        HalIrqUnmask(NUM_HAL_INTERRUPT_UART);
-    }
-}

platform/uart/amba_pl011/amba_pl011.h

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _AMBA_PL011_UART_H
-#define _AMBA_PL011_UART_H
-
-#include "los_typedef.h"
-
-#ifdef __cplusplus
-#if __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-
-#define UART_DR                 0x0   /* data register */
-#define UART_RSR                0x04
-#define UART_FR                 0x18  /* flag register */
-#define UART_CLR                0x44  /* interrupt clear register */
-#define UART_CR                 0x30  /* control register */
-#define UART_IBRD               0x24  /* interge baudrate register */
-#define UART_FBRD               0x28  /* decimal baudrate register */
-#define UART_LCR_H              0x2C
-#define UART_IFLS               0x34  /* fifo register */
-#define UART_IMSC               0x38  /* interrupt mask register */
-#define UART_RIS                0x3C  /* base interrupt state register */
-#define UART_MIS                0x40  /* mask interrupt state register */
-#define UART_ICR                0x44
-#define UART_DMACR              0x48  /* DMA control register */
-
-#define CMD_LENGTH  128
-
-extern CHAR g_inputCmd[CMD_LENGTH];
-extern INT32 g_inputIdx;
-
-#ifdef __cplusplus
-#if __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* __cplusplus */
-#endif

platform/uart/dw-3.0.8a/uart.c

-/*
- * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this list of
- *    conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice, this list
- *    of conditions and the following disclaimer in the documentation and/or other materials
- *    provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its contributors may be used
- *    to endorse or promote products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "los_event.h"
-#include "hisoc/uart.h"
-
-
-EVENT_CB_S g_uartEvent;
-#ifdef LOSCFG_PLATFORM_UART_WITHOUT_VFS
-#ifdef LOSCFG_SHELL
-#define UART_BUF    128
-static UINT8 g_uart_buf[UART_BUF];
-extern void shellCmdLineParse(CHAR c, pf_OUTPUT pf_put);
-#endif
-#endif
-UINT8 uart_getc(void)
-{
-    UINT8 ch = 0;
-
-    while (!(GET_UINT32(UART_REG_BASE + UART_USR) & 0x08)) { /*lint !e40*/
-        LOS_Msleep(100);
-    }
-    /* receive one char */
-    READ_UINT8(ch, UART_REG_BASE + UART_DR);
-    return ch;
-}
-
-#if defined(LOSCFG_COREDUMP) || defined(LOSCFG_LLTSER)
-UINT8 uart_getc_interrupt(void)
-{
-    UINT8 ch = 0;
-
-    while (!(GET_UINT32(UART_REG_BASE + UART_USR) & 0x08)) { /*lint !e40*/
-    }
-    /* receive one char */
-    READ_UINT8(ch, UART_REG_BASE + UART_DR);
-    return ch;
-}
-#endif
-/* send */
-char uart_putc (char c)
-{
-    /* Wait until THRE is empyt */
-    while (!(GET_UINT32(UART_REG_BASE + UART_USR) & 0x02)); /*lint !e40*/
-    /* send one char */
-    WRITE_UINT8(c, UART_REG_BASE + UART_DR);
-    return c;
-}
-
-unsigned int g_uart_fputc_en __attribute__ ((section(".data"))) = 1;
-char uart_fputc(char c, void *f)
-{
-    if (g_uart_fputc_en == 1) {
-        if (c == '\n') {
-            uart_putc('\r'); /*lint !e534*/
-        }
-        return (uart_putc(c));
-    } else {
-        return 0;
-    }
-}
-
-#ifdef LOSCFG_PLATFORM_UART_WITHOUT_VFS
-#ifdef LOSCFG_SHELL
-static void uart_notice_adapt(void)
-{
-    LOS_EventWrite(&g_uartEvent, 0x112);
-}
-
-void uart_get_raw(void)
-{
-    UINT8 ch;
-    static int cnt_ii = 0;
-    if (cnt_ii == 0) {
-        (VOID)memset_s(g_uart_buf, UART_BUF, 0, UART_BUF);
-    }
-    ch = uart_getc();
-    g_uart_buf[cnt_ii] = ch;
-    cnt_ii++;
-    switch (cnt_ii) {
-        case 1: // only one char
-            if (ch != 27) {  //   un special
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-        case 2:
-            if (ch != 91) {
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-        case 3:
-            switch (ch) {
-                default:
-                case 'A':
-                case 'B':
-                case 'C':
-                case 'D':
-                    {
-                        uart_notice_adapt();
-                        cnt_ii = 0;
-                    }
-                    break;
-                case 51:
-                case 49:
-                case 52:
-                    break;
-            }
-            break;
-        case 4:
-            {
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-        default:
-            {
-                uart_notice_adapt();
-                cnt_ii = 0;
-            }
-            break;
-    }
-}
-extern void dprintf(const char *fmt, ...);
-
-static void uart_irqhandle(void)
-{
-    UINT8 ch;
-    shellCmdLineParse(0, dprintf);
-}
-
-int uart_hwiCreate(void)
-{
-    UINT32 uwRet = 0;
-    if (uwRet != LOS_HwiCreate(NUM_HAL_INTERRUPT_UART, 0xa0, 0, uart_irqhandle, 0)) {
-        return uwRet;
-    }
-    uart_interrupt_unmask();
-    return 0;
-}
-
-#endif
-#endif
-void uart_init()
-{
-    unsigned int temp;
-    unsigned int divider;
-    unsigned char dividerH, dividerL;
-
-    /* disable UART1 FIFO */
-    WRITE_UINT32(0, UART_REG_BASE + UART_FCR); /*lint !e40*/
-
-    /* reset and enable UART1 FIFO */
-    WRITE_UINT32(0x7, UART_REG_BASE + UART_FCR); /*lint !e40*/
-
-    /* disable UART1 interrupt */
-    WRITE_UINT32(0, UART_REG_BASE + UART_IER); /*lint !e40*/
-
-    /* enable DLL and DLH */
-    WRITE_UINT32(0x80, UART_REG_BASE + UART_LCR); /*lint !e40*/
-    /* Caculate devide */
-    temp = 16 * CONSOLE_UART_BAUDRATE;
-    divider = CONFIG_UART_CLK_INPUT / temp;
-    dividerH = ((divider) & 0xff00) >> 8;
-    dividerL = ((divider) & 0x00ff);
-
-    /* configure DLL and DLH */
-    WRITE_UINT32(dividerL, UART_REG_BASE + UART_DLL); /*lint !e40*/
-    WRITE_UINT32(dividerH, UART_REG_BASE + UART_DLH); /*lint !e40*/
-
-    /* disable DLL and DLH */
-    WRITE_UINT32(0x0, UART_REG_BASE + UART_LCR); /*lint !e40*/
-
-    /* 8bit data, 1bit stop,even parity */
-    WRITE_UINT32(0x1b, UART_REG_BASE + UART_LCR); /*lint !e40*/
-
-    /* enable UART1 */
-    WRITE_UINT32(0x1, UART_REG_BASE + UART_IER); /*lint !e40*/
-
-    (VOID)LOS_EventInit(&g_uartEvent);
-}
-
-void uart_interrupt_unmask(void)
-{
-    HalIrqUnmask(NUM_HAL_INTERRUPT_UART);
-}