CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: NBill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Due to the SMP nature of some of the chips, which have per CPU
registers, the driver does not use the generic irq_gc_mask_set_bit() &
irq_gc_mask_clr_bit() functions, which only support a single register.
The driver has its own implementation of these functions, which can
pick the correct register depending on the CPU being used. The
functions do however use the gc->mask_cache value.

The call to irq_setup_generic_chip() was passing
IRQ_GC_INIT_MASK_CACHE, which caused the gc->mask_cache to be
initialized to the contents of some random register. This resulted in
unexpected interrupts been delivered from random GPIO lines.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Tested-by: NJamie Lentin <jm@lentin.co.uk>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: NMichael Walle <michael@walle.cc>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This change was originally titled "gpio/omap: fix off-mode bug: clear debounce
clock enable mask on free/reset". The title has been updated slightly to
reflect (what should be) the final fix.

When a GPIO is freed or shutdown, we need to ensure that any debounce settings
are cleared and if the GPIO is the only GPIO in the bank that is currently
using debounce, then disable the debounce clock as well to save power.

Currently, the debounce settings are not cleared on a GPIO free or shutdown and
so during a context restore on subsequent off-mode transition, the previous
debounce values are restored from the shadow copies (bank->context.debounce*)
leading to mismatch state between driver state and hardware state.

This was discovered when board code was doing

  gpio_request_one()
  gpio_set_debounce()
  gpio_free()

which was leaving the GPIO debounce settings in a confused state.  If that GPIO
bank is subsequently used with off-mode enabled, bogus state would be restored,
leaving GPIO debounce enabled which then prevented the CORE powerdomain from
transitioning.

To fix this, introduce a new function called _clear_gpio_debounce() to clear
any debounce settings when the GPIO is freed or shutdown. If this GPIO is the
last debounce-enabled GPIO in the bank, the debounce will also be cut.

Please note that we cannot use _gpio_dbck_disable() to disable the debounce
clock because this has been specifically created for the gpio suspend path
and is intended to shutdown the debounce clock while debounce is enabled.

Special thanks to Kevin Hilman for root causing the bug. This fix is a
collaborative effort with inputs from Kevin Hilman, Grazvydas Ignotas and
Santosh Shilimkar.

Testing:
- This has been unit tested on an OMAP3430 Beagle board, by requesting a gpio,
  enabling debounce and then freeing the gpio and checking the register
  contents, the saved register context and the debounce clock state.
- Kevin Hilman tested on 37xx/EVM board which configures GPIO debounce for the
  ads7846 touchscreen in its board file using the above sequence, and so was
  failing off-mode tests in dynamic idle. Verified that off-mode tests are
  passing with this patch.

V5 changes:
- Corrected author
Reported-by: NPaul Walmsley <paul@pwsan.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: NJon Hunter <jon-hunter@ti.com>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

gpios requested with invalid numbers, or gpios requested from userspace via sysfs
should not try to be deferred on failure.

Cc: stable@kernel.org
Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ->direction_output() operation of gpio_chip is supposed to set the
direction to output but also to set the GPIO to an initial
value. Unfortunately, this last part was not done until now, causing
for example the LEDs to not be properly set to their default initial
value. This patch fixes this by calling the mvebu_gpio_set() function
from mvebu_gpio_direction_output() before configuring the GPIO as an
output GPIO.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The new registers handling in the gpio-74x164 driver allocates chip->registers
* 8 bytes where only one byte per register is necessary. This patch fixes this.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

->last_ier is an unsigned long but the high bits can't be used int the
original code because the shift wraps.

Cc: stable@kernel.org
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Patch 6e20a0a4 "gpio: pcf857x: enable gpio_to_irq() support"
added IRQ domain support to the pcf857x driver, but some configurations
(e.g. davinci_all_defconfig) don't already enable CONFIG_IRQ_DOMAIN.

Always selecting it from the Kconfig in this case is what other
such drivers do as well, and avoids these build errors:

Without this patch, building davinci_all_defconfig results in:

drivers/gpio/gpio-pcf857x.c: In function 'pcf857x_to_irq':
drivers/gpio/gpio-pcf857x.c:167:2: error: implicit declaration of function 'irq_create_mapping'
drivers/gpio/gpio-pcf857x.c: In function 'pcf857x_irq_demux_work':
drivers/gpio/gpio-pcf857x.c:183:3: error: implicit declaration of function 'irq_find_mapping'
drivers/gpio/gpio-pcf857x.c: In function 'pcf857x_irq_domain_cleanup':
drivers/gpio/gpio-pcf857x.c:218:3: error: implicit declaration of function 'irq_domain_remove'
drivers/gpio/gpio-pcf857x.c: In function 'pcf857x_irq_domain_init':
drivers/gpio/gpio-pcf857x.c:230:2: error: implicit declaration of function 'irq_domain_add_linear'
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds the missing gpi28 to the list of GPIOs in the GPI P3 "chip".

NOTE: This patch depends on incrementing LPC32XX_GPI_P3_MAX.  When applied
without the respective mach-lpc32xx patch (merged via arm-soc.git), gcc will
give a warning about "excess elements in array initializer" but this doesn't
harm.
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

For GPIOs of gpio-lpc32xx, gpio_direction_output() ignores the value argument
(initial value of output). This patch fixes this by setting the level
accordingly.

Cc: stable@kernel.org
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Acked-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver aims at replacing the arch/arm/plat-orion/gpio.c driver,
and is designed to be compatible with all Marvell EBU SoCs: Orion,
Kirkwood, Dove, Armada 370/XP and Discovery.

It has been successfully tested on Dove and Armada XP at the moment.

Compared to the plat-orion driver, this new driver has the following
added benefits:

 *) Support for Armada 370 and Armada XP
 *) It is integrated with the mvebu pinctrl driver so that GPIO pins
    are properly muxed, and the GPIO driver knows which GPIO pins are
    output-only or input-only.
 *) Properly placed in drivers/gpio
 *) More extensible mechanism to support platform differences. The
    plat-orion driver uses a simple mask-offset DT property, which
    works fine for Discovery MV78200 but not for Armada XP. The new
    driver uses different compatible strings to identify the different
    variants of the GPIO controllers.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Converted the existing arch-vt8500 gpio to a platform_device.
Added support for WM8505 and WM8650 GPIO controllers.
Replaced existing readl/writel calls with _relaxed variants.
Replaced existing unsigned variables with u32 to match register size.
Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

TWL6040 provides GPO lines to be used for controlling external devices.The number
of lines different between versions: twl6040 have 3 GPO while TWL6041 have 1.
Signed-off-by: NSergio Aguirre <saaguirre@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

This commit adds a driver for the Avionic Design N-bit GPIO expander.
The expander provides a variable number of GPIO pins with interrupt
support.

Changes in v2:
- allow building the driver as a module
- assign of_node unconditionally
- use linear mapping IRQ domain
- properly cleanup IRQ domain
- add OF device table and annotate device tables
- emulate rising and falling edge triggers
- increase #gpio-cells to 2
- drop support for !OF
- use IS_ENABLED to conditionalize DEBUG_FS code

Changes in v3:
- make IRQ support runtime configurable (interrupt-controller property)
- drop interrupt-controller and #interrupt-cells from DT binding
- add inline to_adnp() function to wrap container_of() macro
- consistently use adnp as name for struct adnp variables
- remove irq_mask_cur and rename irq_mask to irq_enable
- fix a subtle deadlock in adnp_gpio_direction_output()
- remove dynamic allocations from debugfs code
- rename regs to num_regs to avoid confusion
- annotate non-trivial code with comments
- don't acquire mutex in adnp_gpio_get()
- assume NO_IRQ == 0

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: linux-kernel@vger.kernel.org
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Using for_each_set_bit() to simplify the code.

spatch with a semantic match is used to found this.
(http://coccinelle.lip6.fr/)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Using for_each_set_bit() to simplify the code.

spatch with a semantic match is used to found this.
(http://coccinelle.lip6.fr/)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The ICH chips have their GPIO pins organized in 2 or 3 independent
groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make
use of pins in one group, preventing the OS to access these. This does
not prevent the OS from accessing the other group(s).

This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS
wants to control GPIO 18 (group 1), while I (the OS) need to control
GPIO 52 and 53 (group 2) for SMBus multiplexing.

So instead of checking for ACPI resource conflict on the whole I/O
range, check on a per-group basis, and consider it a success if at
least one of the groups is available for the OS to use.
Signed-off-by: NJean Delvare <khali@linux-fr.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Aaron Sierra <asierra@xes-inc.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

The driver was using a 16 bit field for storing the shadow value of the shift
register cascade. This resulted in only the first 2 shift registeres receiving
the correct data. The third shift register would always receive 0x00.

Fix this by using a 32bit field for the shadow value.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Cc: linux-kernel@vger.kernel.org

This way we can remove includes of plat/gpio.h which won't work
with the single zImage support.

Note that we also remove the cpu_class_is_omap2() check
in gpio-omap.c as the drivers should not call it as we need to
make it local to arch/arm/mach-omap2 for single zImage support.

While at it, arrange the related includes in the standard way.

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-mtd@lists.infradead.org
Cc: alsa-devel@alsa-project.org
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

We can't use hardcoded interrupts for SPARSE_IRQ, and can replace
the hardcoded gpio_base with twl_gpiochip.base after it's been
allocated.

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Here we provide a means to probe and extract vital information
from Device Tree when booting with it enabled. Without this
patch sub-devices wouldn't be able to reference the tc3589x-gpio
expander from Device Tree.

CC: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In preparation for Device Tree enablement all IRQ controllers
should control their own IRQ domain. This patch provides just
that for the tc3589x GPIO expander.

CC: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

6e20a0a4
(gpio: pcf857x: enable gpio_to_irq() support)
added new smatch warnings

drivers/gpio/gpio-pcf857x.c:288 pcf857x_probe() error: we previously \
	assumed 'pdata' could be null (see line 277)
drivers/gpio/gpio-pcf857x.c:364 pcf857x_probe() warn: variable dereferenced\
	 before check 'pdata' (see line 292)
drivers/gpio/gpio-pcf857x.c:421 pcf857x_remove() error: we previously\
	 assumed 'pdata' could be null (see line 410)

This patch fixes it
Reported-by: NFengguang Wu <fengguang.wu@intel.com>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The shift registers have an output pin that, when enabled, propagates
the values of its internal register to the pins. If another value comes
to the register while the output pin is disabled, this new value will
makae the older shift into the next register in the chain.

This patch adds support for daisy-chaining the registers, using the
regular SPI chip select mechanism to manage the output pin, and the
registers-number dt property to set the number of chained registers.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Since of_device_id.data is declared as a pointer to const data a few
more consts can be added in this driver.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This prepares *of_device_id.data becoming const. Without this change
the following warning would occur:

	drivers/gpio/gpio-mpc8xxx.c: In function 'mpc8xxx_add_controller':
	drivers/gpio/gpio-mpc8xxx.c:360:30: warning: assignment discards 'const' qualifier from pointer target type [enabled by default]
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This prepares *of_device_id.data becoming const. Without this change
the following warning would occur:

	drivers/gpio/gpio-omap.c: In function 'omap_gpio_probe':
	drivers/gpio/gpio-omap.c:1060: warning: assignment discards qualifiers from pointer target type
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Adds a number of missing device tree properties for
twl4030/gpio, and update bindings:
- "ti,use-leds"  -> .use_leds
- "ti,debounce"  -> .debounce
- "ti,mmc-cd"    -> .mmc_cd
- "ti,pullups"   -> .pullups
- "ti,pulldowns" -> .pulldowns
Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NVaibhav Hiremath <hvaibhav@ti.com>
[b-cousson@ti.com: Fix some checkpatch CHECK issues]
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>

Until now the EXYNOS-SoC was the only Samsung-SoC supporting the GPIOs
via the device tree. This patch implements dt-support for the
s3c24xx arches.

The controllers contain only 3 cells, as the underlying gpio controller
does not support controlling the drive strength on a gpio level.

Tested with the gpio-keys driver on a s3c2416 based machine.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
[kgene.kim@samsung.com: fixed build error]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Pinctrl driver, when enabled, registers all the gpio pins and hence the
registration of gpio pins by this driver can be skipped.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Nothing from these files is needed, so remove the includes. This helps
single zImage work by reducing use of the mach-tegra/include/mach/
directory.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Then we can remove irq_to_priv() function.
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>