This commit needs to be reverted because it prevents people from
using the serial console as a secondary console with input being
directed to tty0.

IOW, if you boot with console=ttyS0 console=tty0 then all kernels
prior to this commit will produce output on both ttyS0 and tty0
but input will only be taken from tty0.  With this patch the serial
console will always be the primary console instead of tty0,
potentially preventing people from getting into their machines in
emergency situations.

Fixes: d03516df ("tty: serial: 8250: add CON_CONSDEV to flags")
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

When in RS485 emulation mode, __do_stop_tx_rs485() calls
serial8250_clear_fifos().  This not only clears the FIFOs, but also sets
all bits in their control register (UART_FCR) to 0.

One of the effects of this is the disabling of the FIFOs, which turns
them into single-byte holding registers.  The rest of the driver doesn't
know this, which results in the lions share of characters passed into a
write call to be dropped.

(I can supply logic analyzer screenshots if necessary)

This fix replaces the serial8250_clear_fifos() call to
serial8250_clear_and_reinit_fifos() - this prevents the "dropped
characters" issue from manifesting again while retaining the requirement
of clearing the RX FIFO after transmission if the SER_RS485_RX_DURING_TX
flag is disabled.
Signed-off-by: NDaniel Jedrychowski <avistel@gmail.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Commit f209fa03 ("serial: 8250_pci: Detach low-level driver during
PCI error recovery") introduces a potential use-after-free in case the
pciserial_init_ports call in serial8250_io_resume fails, which may
happen if a memory allocation fails or if the .init quirk failed for
whatever reason).  If this happen, further pci_get_drvdata will return a
pointer to freed memory.

This patch reworks the PCI recovery resume hook to restore the old priv
structure in this case, which should be ok, since the ports were already
detached. Such error during recovery causes us to give up on the
recovery.

Fixes: f209fa03 ("serial: 8250_pci: Detach low-level driver during
  PCI error recovery")
Reported-by: NMichal Suchanek <msuchanek@suse.com>
Signed-off-by: NGabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
Signed-off-by: NGuilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Fix the following Calltrace:
[   77.768221] WARNING: CPU: 5 PID: 645 at drivers/dma/dmaengine.c:1069 dma_async_device_unregister+0xe2/0xf0
[   77.775058] dma_async_device_unregister called while 1 clients hold a reference
[   77.825048] CPU: 5 PID: 645 Comm: sh Not tainted 4.8.8-WR9.0.0.0_standard+ #3
[   77.832550] Hardware name: Intel Corp. Aspen Cove/Server, BIOS HAVLCRB1.X64.0012.D58.1604140405 04/14/2016
[   77.840396]  0000000000000000 ffffc90008adbc80 ffffffff81403456 ffffc90008adbcd0
[   77.848245]  0000000000000000 ffffc90008adbcc0 ffffffff8105e2e1 0000042d08adbf20
[   77.855934]  ffff88046a861c18 ffff88046a85c420 ffffffff820d4200 ffff88046ae92318
[   77.863601] Call Trace:
[   77.871113]  [<ffffffff81403456>] dump_stack+0x4f/0x69
[   77.878655]  [<ffffffff8105e2e1>] __warn+0xd1/0xf0
[   77.886102]  [<ffffffff8105e34f>] warn_slowpath_fmt+0x4f/0x60
[   77.893508]  [<ffffffff814187a9>] ? find_next_bit+0x19/0x20
[   77.900730]  [<ffffffff814bf83e>] ? dma_channel_rebalance+0x23e/0x270
[   77.907814]  [<ffffffff814bfee2>] dma_async_device_unregister+0xe2/0xf0
[   77.914992]  [<ffffffff814c53aa>] hsu_dma_remove+0x1a/0x60
[   77.921977]  [<ffffffff814ee14c>] dnv_exit+0x1c/0x20
[   77.928752]  [<ffffffff814edff6>] mid8250_remove+0x26/0x40
[   77.935607]  [<ffffffff8144f1b9>] pci_device_remove+0x39/0xc0
[   77.942292]  [<ffffffff8160cfea>] __device_release_driver+0x9a/0x140
[   77.948836]  [<ffffffff8160d0b3>] device_release_driver+0x23/0x30
[   77.955364]  [<ffffffff81447dcc>] pci_stop_bus_device+0x8c/0xa0
[   77.961769]  [<ffffffff81447f0a>] pci_stop_and_remove_bus_device_locked+0x1a/0x30
[   77.968113]  [<ffffffff81450d4e>] remove_store+0x5e/0x70
[   77.974267]  [<ffffffff81607ed8>] dev_attr_store+0x18/0x30
[   77.980243]  [<ffffffff8123006a>] sysfs_kf_write+0x3a/0x50
[   77.986180]  [<ffffffff8122f5ab>] kernfs_fop_write+0x10b/0x190
[   77.992118]  [<ffffffff811bf1c8>] __vfs_write+0x18/0x40
[   77.998032]  [<ffffffff811bfdee>] vfs_write+0xae/0x190
[   78.003747]  [<ffffffff811c1016>] SyS_write+0x46/0xb0
[   78.009234]  [<ffffffff81a4c31b>] entry_SYSCALL_64_fastpath+0x13/0x8f
[   78.014809] ---[ end trace 0c36dd73b7408eb2 ]---

This happens when the 8250 serial controller is hotplugged as follows:
echo 1 > /sys/bus/pci/devices/0000:00:1a.0/remove

This trace happens due to the serial port still holding a reference when
the dma device is unregistered.
The dma unregister routine will check if there is still a reference exist,
if so it will give the WARNING(here serial port still was not unregister).

To fix this, We need to unregister the serial port first, then do DMA
device unregister to make sure there is no reference when to DMA routine.
Signed-off-by: NLiwei Song <liwei.song@windriver.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Several versions of DW DMAC have multi block transfers hardware
support. Hardware support of multi block transfers is disabled
by default if we use DT to configure DMAC and software emulation
of multi block transfers used instead.
Add multi-block property, so it is possible to enable hardware
multi block transfers (if present) via DT.

Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

During a PCI error recovery, like the ones provoked by EEH in the ppc64
platform, all IO to the device must be blocked while the recovery is
completed.  Current 8250_pci implementation only suspends the port
instead of detaching it, which doesn't prevent incoming accesses like
TIOCMGET and TIOCMSET calls from reaching the device.  Those end up
racing with the EEH recovery, crashing it.  Similar races were also
observed when opening the device and when shutting it down during
recovery.

This patch implements a more robust IO blockage for the 8250_pci
recovery by unregistering the port at the beginning of the procedure and
re-adding it afterwards.  Since the port is detached from the uart
layer, we can be sure that no request will make through to the device
during recovery.  This is similar to the solution used by the JSM serial
driver.

I thank Peter Hurley <peter@hurleysoftware.com> for valuable input on
this one over one year ago.
Signed-off-by: NGabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add a set_ldisc function to enable/disable IrDA SIR mode according to
the new line discipline, if IrDA SIR mode is supported by the hardware
configuration.
Signed-off-by: NEd Blake <ed.blake@imgtec.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Expose set_ldisc() function so that it can be overridden with a
platform specific implementation.
Signed-off-by: NEd Blake <ed.blake@imgtec.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add an IrDA UART capability flag and change the type of
uart_8250_port.capabilities to be u32 rather than unsigned short to
accommodate the additional flag.
Signed-off-by: NEd Blake <ed.blake@imgtec.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

When any 8250 based driver sets up DMA and has UART_CAP_RPM capability enabled
the device is left powered on after transfer is done. We need to schedule a
device suspend operation when DMA completes the transfer.

The patch is based on the work done by the reporter.
Reported-by: NHuiquan Zhong <huiquan.zhong@intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The following fix of runtime PM use in DMA mode requires at least
serial8250_rpm_put_tx() to be available. Export both calls.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The fresh new serial driver for pxa produces warnings when
CONFIG_PM_SLEEP is disabled:

drivers/tty/serial/8250/8250_pxa.c:50:12: error: 'serial_pxa_resume' defined but not used [-Werror=unused-function]
drivers/tty/serial/8250/8250_pxa.c:41:12: error: 'serial_pxa_suspend' defined but not used [-Werror=unused-function]

This removes the #ifdef around the two functions and instead marks both
as __maybe_unused, which is more robust and avoids the warning.

Fixes: ab28f51c ("serial: rewrite pxa2xx-uart to use 8250_core")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Hi,
below patch to fix Fourth port offset of Percom PI7C9X7954 boards.

I had a problem using Fourth port on a pci express serial board based on Pericom
PI7C9X7954. Reading datasheet I notice a "special" offset assign to this port
when used in I/O mode.

Offset 0x0 ->  UART 0
Offset 0x8 ->  UART 1
Offset 0x10 ->  UART 2
Offset 0x38 ->  UART 3  <<---- This don't follow a logical sequence

This patch add a different init to last port, to have right offset.

I check also Pericom 7952 and 7958 but that devices follow logical sequence,
so they are ok.

Regards,
Angelo
Signed-off-by: NAngelo Butti <buttiangelo@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The newly added pxa glue driver for 8250 supports console output, but
fails to build if the 8250 console is disabled:

drivers/tty/serial/8250/8250_pxa.o: In function `early_serial_pxa_setup':
8250_pxa.c:(.init.text+0x50): undefined reference to `early_serial8250_setup'

This adds an #ifdef like the other glue drivers have it.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The hardware book says, the FCR is combined with a register called
CHAR (it will trigger interrupt when a specific character is
received).  At first, I used lock/read/modify/write/unlock dance for
the FCR to not affect the upper bits, but the CHAR is actually never
used.  It should not hurt to always clear the CHAR and to handle the
FCR as a normal case.  It can save the costly locking.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: NDenys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

For this driver, uart_port::regshift is always 2.  Hardcode the
shift value instead of reading ->regshift to get an already known
value.  (pointed out by Denys Vlasenko)

Furthermore, I am using register macros that are already shifted,
which will save code a bit.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

NXP SC16C2552 requires that we always write a reset to the RX FIFO and
TX FIFO whenever we enable the FIFOs

Cc: xe-kernel@external.cisco.com
Signed-off-by: NSteve Shih <sshih@cisco.com>
Signed-off-by: NDavid Singleton <davsingl@cisco.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Fintek F81865 is a LPC to 6 UARTs SuperIO. It has less functional UARTs
likes F81866. It's also need check the IRQ mode with system assigned,
but the configuration is not the same with F81216 series.

F81865 IRQ Mode setting:
    0xf0
            Bit1: IRQ_MODE0
            Bit0: Share mode (always on)

    Level/Low: IRQ_MODE0:0
    Edge/High: IRQ_MODE0:1

The following list is brief descriptions of F81865:

F81865 (0704)
    9Bit(not implements with mainline)
    RS485(implemented)
Suggested-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Fintek F81866 is a LPC to 6 UARTs SuperIO. It has fully functional UARTs
likes F81216H. It's also need check the IRQ mode with system assigned,
but the configuration is not the same with F81216 series.

F81866 IRQ Mode setting:
	0xf0
		Bit1: IRQ_MODE0
		Bit0: Share mode (always on)
	0xf6
		Bit3: IRQ_MODE1

	Level/Low: IRQ_MODE0:0, IRQ_MODE1:0
	Edge/High: IRQ_MODE0:1, IRQ_MODE1:0

The following list is brief descriptions of F81866:

F81866 (1010)
	9Bit/High baud rate(not implements with mainline)
	RS485, 128Bytes FIFO (implemented)
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Fintek F81216 is a LPC to 4 UARTs device. It's the F81216 series but
support less functional than F81216AD/F81216H

The following list is brief descriptions of F81216 series:

F81216H (0105)
	9Bit/High baud rate(not implements with mainline)
	RS485, 128Bytes FIFO (implemented)

F81216AD (0216)
	9Bit(not implements with mainline)
	RS485(implemented)

F81216 (0208)
	basically 16550A
Suggested-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Fintek F81216H had maximum 128Bytes FIFO, but some BIOS configurated
as normal 16Bytes FIFO. This patch will set 128Bytes FIFO and trigger
level multiplier as 4x when F81216H detected.

Default 16550A trigger level is 8Bytes. When this patch applied, the
trigger level will change to 8Byte x 4 = 32Byte. It can be reduce the RX
incoming interrupts.
Suggested-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Set IRQ Mode when port probed in probe_setup_port()

It should hold the IO port premission via fintek_8250_enter_key() and
release via fintek_8250_exit_key() when we configure the SuperIO.

This patch will move all SuperIO configure operations to
probe_setup_port() to reduce fintek_8250_enter_key() and
fintek_8250_exit_key() usage.
Suggested-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

If we need to access SuperIO registers, It should write register offset
to base_addr and read/write value to base_addr + 1 to perform read/write.
We can make it more simply with write/read functions.

This patch add sio_read_reg()/sio_write_reg()/sio_write_mask_reg() to
reduce SuperIO register operation with lot of outb()/inb().
Signed-off-by: NJi-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Transfer the device-tree pxa uart handling from 8250_of to the new
8250_pxa.  As a corollary, add the early console definition into
8250_pxa.

This enables to have the same uart node for the early console and the
normal uart.
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Instead of a direct assignment use pci_irq_vector() call as it's done for the
other case.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Enable MWI mechanism if PCI bus master supports it.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

There is no need to set PCI bus mastering when device is not doing any DMA.
Though on Intel Quark DMA is a part of UART IP and thus shares same device in
Linux kernel.

Enable bus mastering only for Quark case.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The commit 4fe0d154 ("PCI: Use positive flags in pci_alloc_irq_vectors()")
replaces flags from negative to positive values which makes mandatory to have
the last argument in pci_alloc_irq_vectors() non-zero (if we want to be no-op).
This basically drops MSI enabling in 8250_lpss driver.

Restore desired behaviour in 8250_lpss by passing PCI_IRQ_ALL_TYPES instead of
0 to pci_alloc_irq_vectors().

Fixes: 60a9244a ("serial: 8250_lpss: enable MSI for Intel Quark")
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NBryan O'Donoghue <pure.logic@nexus-software.ie>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

pxa2xx-uart was a separate uart platform driver. It was declaring
the same device names and numbers as 8250 driver. As a result,
it was impossible to use 8250 driver on PXA SoCs.

Upon closer examination pxa2xx-uart turned out to be a clone of
8250_core driver.

Workaround for Erratum #19 according to Marvel(R) PXA270M Processor
Specification Update (April 19, 2010) is dropped. 8250_core reads
from FIFO immediately after checking DR bit in LSR.

The patch leaves the original SERIAL_PXA driver around. The original
driver is just marked DEPRECATED in Kconfig and C source. When
the original driver is considered safe to remove, no changes
to SERIAL_8250 will be necessary.

Compiling SERIAL_8250_CONSOLE and SERIAL_PXA_CONSOLE even without
SERIAL_8250_PXA breaks console for SERIAL_PXA. For this reasons, the new
and the original drivers are made mutually exclusive.
Signed-off-by: NSergei Ianovich <ynvich@gmail.com>
CC: Heikki Krogerus <heikki.krogerus@linux.intel.com>
CC: James Cameron <quozl@laptop.org>
CC: Robert Jarzmik <robert.jarzmik@free.fr>
CC: Russell King <linux@arm.linux.org.uk>
Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
[rebased on v4.8]
Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

At this point, 'value' is always a byte, then this code is clearing
bit 15, which is already clear.  I meant to clear bit 7.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: NDenys Vlasenko <dvlasenk@redhat.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Commit 1681d211 ("serial: 8250_uniphier: add "\n" at the end of
error log") missed this.
Signed-off-by: NDenys Vlasenko <dvlasenk@redhat.com>
[masahiro: add commit log]
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The Altera 16550 soft IP UART requires 2 additional registers for
TX FIFO threshold support. These 2 registers enable the TX FIFO
Low Watermark and set the TX FIFO Low Watermark.
Set the TX FIFO threshold to the FIFO size - tx_loadsz.
Signed-off-by: NThor Thayer <tthayer@opensource.altera.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Initialize the tx_loadsz parameter from passed in devicetree
tx-threshold parameter.
The tx_loadsz is calculated as the number of bytes to fill FIFO
when tx-threshold is triggered.
Signed-off-by: NThor Thayer <tthayer@opensource.altera.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

First loop in wait_for_xmitr could also trigger NMI
watchdog in case reading from the port is slow:

  PID: 0      TASK: ffffffff819c1460  CPU: 0   COMMAND: "swapper/0"
   #0 [ffff88019f405e58] crash_nmi_callback at ffffffff8104d382
   #1 [ffff88019f405e68] nmi_handle at ffffffff8168ead9
   #2 [ffff88019f405eb0] do_nmi at ffffffff8168ec53
   #3 [ffff88019f405ef0] end_repeat_nmi at ffffffff8168df13
      [exception RIP: delay_tsc+50]
      RIP: ffffffff81325642  RSP: ffff88019f403bb0  RFLAGS: 00000083
      RAX: 00000000000005c8  RBX: ffffffff81f83000  RCX: 0000024e4fb88a8b
      RDX: 0000024e4fb89053  RSI: 0000000000000000  RDI: 00000000000007d1
      RBP: ffff88019f403bb0   R8: 000000000000000a   R9: 0000000000000000
      R10: 0000000000000000  R11: ffff88019f403ad6  R12: 000000000000250f
      R13: 0000000000000020  R14: ffffffff81d360c7  R15: 0000000000000047
      ORIG_RAX: ffffffffffffffff  CS: 0010  SS: 0018
  --- <NMI exception stack> ---
   #4 [ffff88019f403bb0] delay_tsc at ffffffff81325642
   #5 [ffff88019f403bb8] __const_udelay at ffffffff813255a8
   #6 [ffff88019f403bc8] wait_for_xmitr at ffffffff81404390
   #7 [ffff88019f403bf0] serial8250_console_putchar at ffffffff8140455c
   #8 [ffff88019f403c10] uart_console_write at ffffffff813ff00a
   #9 [ffff88019f403c40] serial8250_console_write at ffffffff814044ae
  #10 [ffff88019f403c88] call_console_drivers.constprop.15 at ffffffff81086b01
  #11 [ffff88019f403cb0] console_unlock at ffffffff8108842f
  #12 [ffff88019f403ce8] vprintk_emit at ffffffff81088834
  #13 [ffff88019f403d58] vprintk_default at ffffffff81088ba9
  #14 [ffff88019f403d68] printk at ffffffff8167f034

Adding touch_nmi_watchdog call to the first loop as well.
Reported-by: NChunyu Hu <chuhu@redhat.com>
Signed-off-by: NJiri Olsa <jolsa@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Less magic that only requires comments.
Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Since we have nice macro IRQ_RETVAL() we would use it to convert a flag of
handled interrupt from int to irqreturn_t.

The rationale of doing this is:
a) hence we implicitly mark hsu_dma_do_irq() as an auxiliary function that
   can't be used as interrupt handler directly, and
b) to be in align with serial driver which is using serial8250_handle_irq()
   that returns plain int by design.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Since we have nice macro IRQ_RETVAL() we would use it to convert a flag of
handled interrupt from int to irqreturn_t.

The rationale of doing this is:
a) hence we implicitly mark hsu_dma_do_irq() as an auxiliary function that
   can't be used as interrupt handler directly, and
b) to be in align with serial driver which is using serial8250_handle_irq()
   that returns plain int by design.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

earlycon implementation used "unsigned long" internally, but there are systems
(ARM with LPAE) where sizeof(unsigned long) == 4 and uart is mapped beyond 4GiB
address range.

Switch to resource_size_t internally and replace obsoleted simple_strtoul() with
kstrtoull().
Signed-off-by: NAlexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add ACPI identifier for UART on Hisilicon Hip05 SoC, be careful that
it is not 16550 compatible, and "reg-io-width" and "reg-shift" need
be set properly by _DSD method in DSDT.
Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com>
Acked-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Unify the check of em485 variable to be either (em485) or (!em485) instead of
the explicit comparison to NULL.

While here, remove redundant check in __do_stop_tx_rs485() and
__stop_tx_rs485() since the functions ain't called with NULL value of em485
variable.

Cc: "Matwey V. Kornilov" <matwey@sai.msu.ru>
Tested-by: NYegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>