1. 09 10月, 2010 1 次提交
  2. 08 10月, 2010 1 次提交
  3. 05 8月, 2010 3 次提交
  4. 11 5月, 2010 1 次提交
  5. 13 2月, 2010 1 次提交
  6. 01 12月, 2009 3 次提交
  7. 03 7月, 2009 1 次提交
  8. 05 6月, 2009 2 次提交
  9. 09 3月, 2009 2 次提交
  10. 02 12月, 2008 3 次提交
  11. 27 11月, 2008 1 次提交
  12. 09 9月, 2008 1 次提交
  13. 07 8月, 2008 2 次提交
  14. 05 8月, 2008 1 次提交
  15. 10 7月, 2008 3 次提交
  16. 19 5月, 2008 2 次提交
    • R
      [ARM] pxa: separate PXA25x and PXA27x UDC register definitions · 284d115e
      Russell King 提交于
      The PXA25x and PXA27x USB device controller register definitions are
      different.  Currently, they live side by side in pxa-regs.h, but only
      one set is available depending on the setting of PXA25x or PXA27x.
      
      This means that if we build to support both PXA25x and PXA27x, the
      PXA27x definitions are unavailable, even to PXA27x specific code.
      
      Remove these definitions from pxa-regs.h, and place them in separate
      files.  Include these files where appropriate.
      
      Note: according to the dependencies in drivers/usb/gadget/Kconfig,
      we do not support the UDC on PXA27x nor PXA3xx CPUs, so remove the
      platform devices from pxa27x.c and pxa3xx.c.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      284d115e
    • E
      [ARM] pxa: Add PXA support for PWM API · 75540c1a
      eric miao 提交于
      Patch mainly from Eric Miao, with minor edits by rmk.
      
      Note: PWM0 and PWM2 share the same register I/O space and clock gating
      on pxa{27x, 3xx}, thus PWM2 is treated in the driver as a child PWM of
      PWM0. And this is also true for PWM1/3.
      Signed-off-by: Neric miao <eric.miao@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      75540c1a
  17. 04 5月, 2008 1 次提交
  18. 25 4月, 2008 1 次提交
  19. 19 4月, 2008 8 次提交
  20. 01 3月, 2008 1 次提交
  21. 10 2月, 2008 1 次提交
    • D
      [ARM] 4824/1: pxa: clear RDH bit after any reset · 86260f98
      Dmitry Krivoschekov 提交于
      According to PXA300/310 and PXA320 Developer manuals,
      the ASCR[RDH] "bit needs to be cleared as part of the software
      initialization coming out of any reset and coming out of D3".
      The latter requirement is addressed by commit
      "c4d1fb62", as for the former (coming out of any reset),
      the kernel relies on boot loaders and assumes that RDH bit
      is cleared there. Though, not all bootloaders follow the rule
      so we have to clear the bit in kernel.
      
      We clear the RDH bit in pxa3xx_init() function since
      it is always invoked after any reset. We also preserve D1S, D2S
      and D3S bits from being cleared in case we invoke pxa3xx_init()
      function not from normal hardware reset (e.g. kexec scenario),
      so these bits can be properly referenced later.
      Signed-off-by: NDmitry Krivoschekov <dmitry.krivoschekov@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      86260f98