1. 01 4月, 2006 3 次提交
  2. 29 3月, 2006 1 次提交
  3. 28 3月, 2006 1 次提交
    • A
      [PATCH] Notifier chain update: API changes · e041c683
      Alan Stern 提交于
      The kernel's implementation of notifier chains is unsafe.  There is no
      protection against entries being added to or removed from a chain while the
      chain is in use.  The issues were discussed in this thread:
      
          http://marc.theaimsgroup.com/?l=linux-kernel&m=113018709002036&w=2
      
      We noticed that notifier chains in the kernel fall into two basic usage
      classes:
      
      	"Blocking" chains are always called from a process context
      	and the callout routines are allowed to sleep;
      
      	"Atomic" chains can be called from an atomic context and
      	the callout routines are not allowed to sleep.
      
      We decided to codify this distinction and make it part of the API.  Therefore
      this set of patches introduces three new, parallel APIs: one for blocking
      notifiers, one for atomic notifiers, and one for "raw" notifiers (which is
      really just the old API under a new name).  New kinds of data structures are
      used for the heads of the chains, and new routines are defined for
      registration, unregistration, and calling a chain.  The three APIs are
      explained in include/linux/notifier.h and their implementation is in
      kernel/sys.c.
      
      With atomic and blocking chains, the implementation guarantees that the chain
      links will not be corrupted and that chain callers will not get messed up by
      entries being added or removed.  For raw chains the implementation provides no
      guarantees at all; users of this API must provide their own protections.  (The
      idea was that situations may come up where the assumptions of the atomic and
      blocking APIs are not appropriate, so it should be possible for users to
      handle these things in their own way.)
      
      There are some limitations, which should not be too hard to live with.  For
      atomic/blocking chains, registration and unregistration must always be done in
      a process context since the chain is protected by a mutex/rwsem.  Also, a
      callout routine for a non-raw chain must not try to register or unregister
      entries on its own chain.  (This did happen in a couple of places and the code
      had to be changed to avoid it.)
      
      Since atomic chains may be called from within an NMI handler, they cannot use
      spinlocks for synchronization.  Instead we use RCU.  The overhead falls almost
      entirely in the unregister routine, which is okay since unregistration is much
      less frequent that calling a chain.
      
      Here is the list of chains that we adjusted and their classifications.  None
      of them use the raw API, so for the moment it is only a placeholder.
      
        ATOMIC CHAINS
        -------------
      arch/i386/kernel/traps.c:		i386die_chain
      arch/ia64/kernel/traps.c:		ia64die_chain
      arch/powerpc/kernel/traps.c:		powerpc_die_chain
      arch/sparc64/kernel/traps.c:		sparc64die_chain
      arch/x86_64/kernel/traps.c:		die_chain
      drivers/char/ipmi/ipmi_si_intf.c:	xaction_notifier_list
      kernel/panic.c:				panic_notifier_list
      kernel/profile.c:			task_free_notifier
      net/bluetooth/hci_core.c:		hci_notifier
      net/ipv4/netfilter/ip_conntrack_core.c:	ip_conntrack_chain
      net/ipv4/netfilter/ip_conntrack_core.c:	ip_conntrack_expect_chain
      net/ipv6/addrconf.c:			inet6addr_chain
      net/netfilter/nf_conntrack_core.c:	nf_conntrack_chain
      net/netfilter/nf_conntrack_core.c:	nf_conntrack_expect_chain
      net/netlink/af_netlink.c:		netlink_chain
      
        BLOCKING CHAINS
        ---------------
      arch/powerpc/platforms/pseries/reconfig.c:	pSeries_reconfig_chain
      arch/s390/kernel/process.c:		idle_chain
      arch/x86_64/kernel/process.c		idle_notifier
      drivers/base/memory.c:			memory_chain
      drivers/cpufreq/cpufreq.c		cpufreq_policy_notifier_list
      drivers/cpufreq/cpufreq.c		cpufreq_transition_notifier_list
      drivers/macintosh/adb.c:		adb_client_list
      drivers/macintosh/via-pmu.c		sleep_notifier_list
      drivers/macintosh/via-pmu68k.c		sleep_notifier_list
      drivers/macintosh/windfarm_core.c	wf_client_list
      drivers/usb/core/notify.c		usb_notifier_list
      drivers/video/fbmem.c			fb_notifier_list
      kernel/cpu.c				cpu_chain
      kernel/module.c				module_notify_list
      kernel/profile.c			munmap_notifier
      kernel/profile.c			task_exit_notifier
      kernel/sys.c				reboot_notifier_list
      net/core/dev.c				netdev_chain
      net/decnet/dn_dev.c:			dnaddr_chain
      net/ipv4/devinet.c:			inetaddr_chain
      
      It's possible that some of these classifications are wrong.  If they are,
      please let us know or submit a patch to fix them.  Note that any chain that
      gets called very frequently should be atomic, because the rwsem read-locking
      used for blocking chains is very likely to incur cache misses on SMP systems.
      (However, if the chain's callout routines may sleep then the chain cannot be
      atomic.)
      
      The patch set was written by Alan Stern and Chandra Seetharaman, incorporating
      material written by Keith Owens and suggestions from Paul McKenney and Andrew
      Morton.
      
      [jes@sgi.com: restructure the notifier chain initialization macros]
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NChandra Seetharaman <sekharan@us.ibm.com>
      Signed-off-by: NJes Sorensen <jes@sgi.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e041c683
  4. 27 3月, 2006 6 次提交
  5. 26 3月, 2006 1 次提交
  6. 24 3月, 2006 1 次提交
  7. 23 3月, 2006 1 次提交
    • A
      [PATCH] more for_each_cpu() conversions · 394e3902
      Andrew Morton 提交于
      When we stop allocating percpu memory for not-possible CPUs we must not touch
      the percpu data for not-possible CPUs at all.  The correct way of doing this
      is to test cpu_possible() or to use for_each_cpu().
      
      This patch is a kernel-wide sweep of all instances of NR_CPUS.  I found very
      few instances of this bug, if any.  But the patch converts lots of open-coded
      test to use the preferred helper macros.
      
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Acked-by: NKyle McMartin <kyle@parisc-linux.org>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: William Lee Irwin III <wli@holomorphy.com>
      Cc: Andi Kleen <ak@muc.de>
      Cc: Christian Zankel <chris@zankel.net>
      Cc: Philippe Elie <phil.el@wanadoo.fr>
      Cc: Nathan Scott <nathans@sgi.com>
      Cc: Jens Axboe <axboe@suse.de>
      Cc: Eric Dumazet <dada1@cosmosbay.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      394e3902
  8. 22 3月, 2006 2 次提交
  9. 20 3月, 2006 24 次提交
    • A
      [SPARC64]: CONFIG_BLK_DEV_RAM fix · 467418f3
      Andrew Morton 提交于
      init/do_mounts_rd.c depends upon CONFIG_BLK_DEV_RAM, not CONFIG_BLK_DEV_INITRD.
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      467418f3
    • D
      [SPARC64]: Optimized TSB table initialization. · bb8646d8
      David S. Miller 提交于
      We only need to write an invalid tag every 16 bytes,
      so taking advantage of this can save many instructions
      compared to the simple memset() call we make now.
      
      A prefetching implementation is implemented for sun4u
      and a block-init store version if implemented for Niagara.
      
      The next trick is to be able to perform an init and
      a copy_tsb() in parallel when growing a TSB table.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bb8646d8
    • D
    • D
      [SPARC64]: Increase top of 32-bit process stack. · d61e16df
      David S. Miller 提交于
      Put it one page below the top of the 32-bit address space.
      This gives us ~16MB more address space to work with.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d61e16df
    • D
      [SPARC64]: Top-down address space allocation for 32-bit tasks. · a91690dd
      David S. Miller 提交于
      Currently allocations are very constrained for 32-bit processes.
      It grows down-up from 0x70000000 to 0xf0000000 which gives about
      2GB of stack + dynamic mmap() space.
      
      So support the top-down method, and we need to override the
      generic helper function in order to deal with D-cache coloring.
      
      With these changes I was able to squeeze out a mmap() just over
      3.6GB in size in a 32-bit process.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a91690dd
    • D
      [SPARC64]: Fix and re-enable dynamic TSB sizing. · 7a1ac526
      David S. Miller 提交于
      This is good for up to %50 performance improvement of some test cases.
      The problem has been the race conditions, and hopefully I've plugged
      them all up here.
      
      1) There was a serious race in switch_mm() wrt. lazy TLB
         switching to and from kernel threads.
      
         We could erroneously skip a tsb_context_switch() and thus
         use a stale TSB across a TSB grow event.
      
         There is a big comment now in that function describing
         exactly how it can happen.
      
      2) All code paths that do something with the TSB need to be
         guarded with the mm->context.lock spinlock.  This makes
         page table flushing paths properly synchronize with both
         TSB growing and TLB context changes.
      
      3) TSB growing events are moved to the end of successful fault
         processing.  Previously it was in update_mmu_cache() but
         that is deadlock prone.  At the end of do_sparc64_fault()
         we hold no spinlocks that could deadlock the TSB grow
         sequence.  We also have dropped the address space semaphore.
      
      While we're here, add prefetching to the copy_tsb() routine
      and put it in assembler into the tsb.S file.  This piece of
      code is quite time critical.
      
      There are some small negative side effects to this code which
      can be improved upon.  In particular we grab the mm->context.lock
      even for the tsb insert done by update_mmu_cache() now and that's
      a bit excessive.  We can get rid of that locking, and the same
      lock taking in flush_tsb_user(), by disabling PSTATE_IE around
      the whole operation including the capturing of the tsb pointer
      and tsb_nentries value.  That would work because anyone growing
      the TSB won't free up the old TSB until all cpus respond to the
      TSB change cross call.
      
      I'm not quite so confident in that optimization to put it in
      right now, but eventually we might be able to and the description
      is here for reference.
      
      This code seems very solid now.  It passes several parallel GCC
      bootstrap builds, and our favorite "nut cruncher" stress test which is
      a full "make -j8192" build of a "make allmodconfig" kernel.  That puts
      about 256 processes on each cpu's run queue, makes lots of process cpu
      migrations occur, causes lots of page table and TLB flushing activity,
      incurs many context version number changes, and it swaps the machine
      real far out to disk even though there is 16GB of ram on this test
      system. :-)
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7a1ac526
    • D
      [SPARC64]: First cut at VIS simulator for Niagara. · 0c51ed93
      David S. Miller 提交于
      Niagara does not implement some of the VIS instructions in
      hardware, so we have to emulate them.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0c51ed93
    • D
      [SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check. · 90a6646b
      David S. Miller 提交于
      Report 'sun4v' when appropriate in /proc/cpuinfo
      
      Remove all the verifications of the OBP version string.  Just
      make sure it's there, and report it raw in the bootup logs and
      via /proc/cpuinfo.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      90a6646b
    • D
      [SPARC64]: Add SMT scheduling support for Niagara. · 8935dced
      David S. Miller 提交于
      The mapping is a simple "(cpuid >> 2) == core" for now.
      Later we'll add more sophisticated code that will walk
      the sun4v machine description and figure this out from
      there.
      
      We should also add core mappings for jaguar and panther
      processors.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8935dced
    • D
      [SPARC64]: Move over to sparsemem. · d1112018
      David S. Miller 提交于
      This has been pending for a long time, and the fact
      that we waste a ton of ram on some configurations
      kind of pushed things over the edge.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      d1112018
    • D
      [SPARC64]: Fix new context version SMP handling. · ee29074d
      David S. Miller 提交于
      Don't piggy back the SMP receive signal code to do the
      context version change handling.
      
      Instead allocate another fixed PIL number for this
      asynchronous cross-call.  We can't use smp_call_function()
      because this thing is invoked with interrupts disabled
      and a few spinlocks held.
      
      Also, fix smp_call_function_mask() to count "cpus" correctly.
      There is no guarentee that the local cpu is in the mask
      yet that is exactly what this code was assuming.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ee29074d
    • E
      [SPARC64]: kzalloc() conversion · 9132983a
      Eric Sesterhenn 提交于
      this patch converts arch/sparc64 to kzalloc usage.
      Crosscompile tested with allyesconfig.
      Signed-off-by: NEric Sesterhenn <snakebyte@gmx.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9132983a
    • D
      [SPARC64]: Simplify TSB insert checks. · 74ae9987
      David S. Miller 提交于
      Don't try to avoid putting non-base page sized entries
      into the user TSB.  It actually costs us more to check
      this than it helps.
      
      Eventually we'll have a multiple TSB scheme for user
      processes.  Once a process starts using larger pages,
      we'll allocate and use such a TSB.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      74ae9987
    • D
      [SPARC64]: More SUN4V cpu mondo bug fixing. · 3cab0c3e
      David S. Miller 提交于
      This cpu mondo sending interface isn't all that easy to
      use correctly...
      
      We were clearing out the wrong bits from the "mask" after getting
      something other than EOK from the hypervisor.
      
      It turns out the hypervisor can just be resent the same cpu_list[]
      array, with the 0xffff "done" entries still in there, and it will do
      the right thing.
      
      So don't update or try to rebuild the cpu_list[] array to condense it.
      
      This requires the "forward_progress" check to be done slightly
      differently, but this new scheme is less bug prone than what we were
      doing before.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3cab0c3e
    • D
      [SPARC64]: Fix sun4v mna winfixup handling. · bcc28ee0
      David S. Miller 提交于
      We were clobbering a base register before we were done
      using it.  Fix a comment typo while we're here.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bcc28ee0
    • D
      [SPARC64]: Fix mini RTC driver reading. · c4f8ef77
      David S. Miller 提交于
      Need to subtract 1900 from year and 1 from month before
      giving it back to userspace.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c4f8ef77
    • D
      [SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole. · 8bcd1741
      David S. Miller 提交于
      The UltraSPARC T1 manual recommends this because the chip
      could instruction prefetch into the VA hole, and this would
      also make decoding  certain kinds of memory access traps
      more difficult (because the chip sign extends certain pieces
      of trap state).
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8bcd1741
    • D
      [SPARC64]: Fix _PAGE_EXEC handling. · 45f791eb
      David S. Miller 提交于
      First of all, use the known _PAGE_EXEC_{4U,4V} value instead
      of loading _PAGE_EXEC from memory.  We either know which one
      to use by context, or we can code patch the test.
      
      Next, we need to check executability of a PTE in the generic
      TSB miss handler.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      45f791eb
    • D
      [SPARC64]: Fix typo in SUN4V D-TLB miss handler. · 92daa77e
      David S. Miller 提交于
      Should put FAULT_CODE_DTLB into %g3 not FAULT_CODE_ITLB.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      92daa77e
    • D
      8ba706a9
    • D
      [SPARC64]: Fix bugs in SUN4V cpu mondo dispatch. · b830ab66
      David S. Miller 提交于
      There were several bugs in the SUN4V cpu mondo dispatch code.
      
      In fact, if we ever got a EWOULDBLOCK or other error from
      the hypervisor call, we'd potentially send a cpu mondo multiple
      times to the same cpu and even worse we could loop until the
      timeout resending the same mondo over and over to such cpus.
      
      So let's bulletproof this thing as follows:
      
      1) Implement cpu_mondo_send() and cpu_state() hypervisor calls
         in arch/sparc64/kernel/entry.S, add prototypes to asm/hypervisor.h
      
      2) Don't build and update the cpulist using inline functions, this
         was causing the cpu mask to not get updated in the caller.
      
      3) Disable interrupts during the entire mondo send, otherwise our
         cpu list and/or mondo block could get overwritten if we take
         an interrupt and do a cpu mondo send on the current cpu.
      
      4) Check for all possible error return types from the cpu_mondo_send()
         hypervisor call.  In particular:
      
         HV_EOK) Our work is done, all cpus have received the mondo.
         HV_CPUERROR) One or more of the cpus in the cpu list we passed
                      to the hypervisor are in error state.  Use cpu_state()
                      calls over the entries in the cpu list to see which
      		ones.  Record them in "error_mask" and report this
      		after we are done sending the mondo to cpus which are
      		not in error state.
         HV_EWOULDBLOCK) We need to keep trying.
      
         Any other error we consider fatal, we report the event and exit
         immediately.
      
      5) We only timeout if forward progress is not made.  Forward progress
         is defined as having at least one cpu get the mondo successfully
         in a given cpu_mondo_send() call.  Otherwise we bump a counter
         and delay a little.  If the counter hits a limit, we signal an
         error and report the event.
      
      Also, smp_call_function_mask() error handling reports the number
      of cpus incorrectly.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b830ab66
    • D
      [SPARC64]: Fix bugs in SMP TLB context version expiration handling. · aac0aadf
      David S. Miller 提交于
      1) We must flush the TLB, duh.
      
      2) Even if the sw context was seen to be valid, the local cpu's
         hw context can be out of date, so reload it unconditionally.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aac0aadf
    • D
      [SPARC64]: Fix indexing into kpte_linear_bitmap. · 6889331a
      David S. Miller 提交于
      Need to shift back up by 3 bits to get 8-byte entry
      index.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6889331a
    • D
      [SPARC64]: Bulletproof hypervisor TLB flushing. · 2a3a5f5d
      David S. Miller 提交于
      Check TLB flush hypervisor calls for errors and report them.
      
      Pass HV_MMU_ALL always for now, we can add back the optimization
      to avoid the I-TLB flush later.
      
      Always explicitly page align the virtual address arguments.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      2a3a5f5d