- 09 1月, 2011 22 次提交
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由 Takashi Iwai 提交于
With the bus-width test patch, mmc_set_bus_width*() isn't called properly when the driver doesn't set MMC_CAP_BUS_WIDTH and no DDR mode. This patch fixes the regression by moving the call up before the cap test. Signed-off-by: NTakashi Iwai <tiwai@suse.de> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Will Newton 提交于
This adds the mmc host driver for the Synopsys DesignWare mmc host controller, found in a number of embedded SoC designs. Signed-off-by: NWill Newton <will.newton@imgtec.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Olof Johansson 提交于
SDHCI driver for Tegra. This driver plugs in as a new variant of sdhci-pltfm, using the platform data structure passed in to specify the GPIOs to use for card detect, write protect and card power enablement. Original driver (of which only the header file is left): Signed-off-by: NYvonne Yip <y@palm.com> The rest, which has been rewritten by now: Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Olof Johansson 提交于
Some controllers misparse segment length 0 as being 0, not 65536. Add a quirk to deal with it. Signed-off-by: NOlof Johansson <olof@lixom.net> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Linus Walleij 提交于
Since we make sure the clock is enabled in the mmc_host_clk_exit() function we should expect a reference counter of 1, not 0. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Tested-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jeongbae Seo 提交于
This patch supports controllers with no internal clock divider in SDHCI, such as the s5pc210 board. The external clock divider can be used to make a proper clock because SDHCI doesn't support internal clock divider by itself. If external clock divider type is selected, some functions related to clock control will be overrided by other functions. The current clock control index is added to let you know which clock bus is used for SDHCI when overriding functions. Checking functions are added into sdhci_s3c_consider_clock, because the clock divider step is different from that of host controller. Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jeongbae Seo 提交于
This patch adds support for additional host capabilities like SD/MMC high speed, SDHCI bus width, etc. Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Takashi Iwai 提交于
Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Aries Lee 提交于
Some old MMC devices fail with the 4/8 bits the driver tries to use exclusively. This patch adds a test for the given bus setup and falls back to the lower bit mode (until 1-bit mode) when the test fails. [Major rework and refactoring by tiwai] [Quirk addition and many fixes by prakity] Signed-off-by: NAries Lee <arieslee@jmicron.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NPhilip Rakity <prakity@marvell.com> Tested-by: NPhilip Rakity <prakity@marvell.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Michal Miroslaw 提交于
In case of failure, mmc_attach_sdio() will power off the SD bus. Power it up and reinitialize before trying SD memory detection. Reported-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ohad Ben-Cohen 提交于
Upon system resume, SDIO core must reinitialize cards that were powered off during suspend. If the card had its power kept during suspend (and thus it is 'powered-resumed'), SDIO core performs only a limited reinitializing, mainly needed to make sure that the card wasn't removed/replaced. If a __nonremovable__ card is powered-resumed, we can safely skip the reinitializing phase. Note: 9b966aae (mmc: sdio: fully reconfigure oldcard on resume) removed the bus width reconfiguration since mmc_sdio_init_card already does it. It is brought back now in case mmc_sdio_init_card is skipped. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ohad Ben-Cohen 提交于
Initial SDIO runtime PM implementation took a conservative approach of powering up cards (and fully reinitializing them) on system suspend, just before the suspend handlers of the relevant drivers were executed. To avoid redundant power and reinitialization cycles, this patch removes this behavior: if a card is already powered off when system suspend kicks in, it is left at that state. If a card is active when a system sleep starts, everything is straightforward and works exactly like before. But if the card was already suspended before the sleep began, then when the MMC core powers it back up on resume, its run-time PM status has to be updated to reflect the actual post-system sleep status. The technique to do that is borrowed from the I2C runtime PM implementation (for more info see Documentation/power/runtime_pm.txt). Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Ohad Ben-Cohen 提交于
mmc_rescan() checks whether registered cards are still present before skipping them, by calling the bus-specific ->detect() handler. With buses that support runtime PM, the card may be powered off at this point, so they need to be powered on and fully reinitialized before ->detect() executes. This whole process is redundant with nonremovable cards; in those cases, we can safely skip calling ->detect() and implicitly assume its success. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Takashi Iwai 提交于
JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for SD, but MMC doesn't work with the low-voltage, resulting in an error at probing. This patch adds the support for multiple voltage mask per device type, so that SD works with 1.8V while MMC forces 3.3V. Here new ocr_avail_* fields for each device are introduced, so that the actual OCR mask is switched dynamically. Also, the restriction of low-voltage in core/sd.c is removed when the bit is allowed explicitly via ocr_avail_sd mask. This patch was rewritten from scratch based on Aries' original code. Signed-off-by: NAries Lee <arieslee@jmicron.com> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Joe Perches 提交于
Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Philip Rakity 提交于
More information should be shown when sdhci_dumpregs is called. Knowing the command is useful for debugging, and Capability 1 is useful for SD v3. Signed-off-by: NPhilip Rakity <prakity@marvell.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Linus Walleij 提交于
This patch modifies the MMC core code to optionally call the set_ios() operation on the driver with the clock frequency set to 0 (gate) after a grace period of at least 8 MCLK cycles, then restore it (ungate) before any new request. This gives the driver the option to shut down the MCI clock to the MMC/SD card when the clock frequency is 0, i.e. the core has stated that the MCI clock does not need to be generated. It is inspired by existing clock gating code found in the OMAP and Atmel drivers and brings this up to the host abstraction. Gating is performed before and after any MMC request. This patchset implements this for the MMCI/PL180 MMC/SD host controller, but it should be simple to switch OMAP/Atmel over to using this instead. mmc_set_{gated,ungated}() add variable protection to the state holders for the clock gating code. This is particularly important when ordinary .set_ios() calls would race with the .set_ios() call resulting from a delayed gate operation. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Reviewed-by: NChris Ball <cjb@laptop.org> Tested-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jennifer Li 提交于
This patch disables the broken ADMA on selected O2Micro devices. Signed-off-by: NJennifer Li <Jennifer.li@o2micro.com> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Axel Lin 提交于
Remove release_resource() after release_mem_region(). Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alberto Panizzo 提交于
This also fixes the build problem introduced by my previous patch due to unhandled API changes introduced by commit: 99fc5131 (mmc: Move regulator handling closer to core) Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Alberto Panizzo 提交于
This implementation is based on the pxamci.c driver and it will be used to support the mx31_3ds machine. Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Mike Rapoport 提交于
Implement an sdhci-pltfm driver for the controller found in the Marvell Dove SoC. Signed-off-by: NMike Rapoport <mike@compulab.co.il> CC: Saeed Bishara <saeed@marvell.com> Acked-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 05 1月, 2011 1 次提交
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由 Guennadi Liakhovetski 提交于
Simplify the driver by removing the possibility to build it without the DMA support and remove the respective Kconfig parameter. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 30 12月, 2010 1 次提交
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由 Russell King 提交于
Make the MMCI announcement printk say which primecell part number has been found. Display the revision as an unsigned decimal, and display only the first 8 hex digits of the base address unless it's larger. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 12月, 2010 1 次提交
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由 Tejun Heo 提交于
Workqueue creation API has been updated and flush_scheduled_work() is deprecated and scheduled to be removed. * core/core.c: Use alloc_ordered_workqueue() instead of create_singlethread_workqueue(). This removes an unnecessary rescuer. * host/omap.c: Create, use and flush mmc_omap_wq instead of the system_wq. * Flush host->mmc_carddetect_work directly on removal instead of using flush_scheduled_work(). Signed-off-by: NTejun Heo <tj@kernel.org> Cc: Chris Ball <cjb@laptop.org> Cc: linux-mmc@vger.kernel.org
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- 22 12月, 2010 3 次提交
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由 Takashi Iwai 提交于
In the error-path where PM notifies PM_POST_RESTORE, the rescan-blockage should be cleared as well. Otherwise it'll be never re-probed. Also, as a bonus, this fixes a bug in S4 with user-mode suspend in the current code, as it sends PM_POST_RESTORE instead of PM_POST_HIBERNATION wrongly. Cc: <stable@kernel.org> Signed-off-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Nicolas Ferre 提交于
Based on report made by Yauhen in: "MMC: Fix multiblock SDIO transfers in AT91 MCI" patch, I report those changes to the brother driver: atmel-mci. So, this patch sets SDIO transfer types: SDIO block and SDIO byte transfers instead of using ordinary MMC block transfers. It is checking opcode for SDIO CMD53 and setting transfer type in MCI_CMDR register properly. Reported-by: NYauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Yauhen Kharuzhy 提交于
The AT91 MCI has special SDIO transfer types: SDIO block and SDIO byte transfers, but at91_mci driver doesn't use them and handles all SDIO transfers as ordinary MMC block transfers. This causes problems for multiple-block SDIO transfers (in particular for 256-bytes blocks). Fix this situation by checking the opcode for SDIO CMD53 and setting the transfer type in the AT91_MCI_CMDR register properly. This patch was tested with libertas SDIO driver: problem with TX timeouts on big packets was eliminated. Signed-off-by: NYauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 21 12月, 2010 5 次提交
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由 Sahitya Tummala 提交于
The current code checks for both DATA_END and DATA_BLK_END bits in MCI_STATUS register and ends a request only if both are set at a time. The hardware doesn't always set DATA_BLK_END when DATA_END is set. But DATA_END status itself is sufficient condition from hardware that data transfer is done and hence, check for only DATA_END interrupt in software to end a request. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
The current code for PIO doesn't transfer whole data when data size is not in multiple of 4 bytes. The last few bytes are not written to the card resulting in no DATAEND interrupt from SDCC. This patch allows data transfer for non-aligned data size in PIO mode. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
SDCC uses an asynchronous FIFOs for data synchronization (one for TX and one for RX). For any error when DPSM (Data path state machine) is involved the transfer is terminated with the remaining data stuck inside FIFOs. Reset the controller in case of data errors to ensure that any left over data in FIFOs is flushed out and DPSM is in good state. The following problems are observed without this reset functionality - 1. After the card is removed in an unsafe way (removed when there is an on going data transfer), the card will not be detected upon its next insertion. This is because the controller wouldn't respond to few initialization commands. 2. When an error occurs for a data transfer in non-DMA mode, sometimes we get spurious PIO interrupt after the request is processed. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
Enable prog done interrupt for stop command(CMD12) that is sent after a multi-block write(CMD25). The PROG_DONE bit is set when the card has finished its programming and is ready for next data. After every write request the card will be polled for ready status using CMD13. For a multi-block write(CMD25) before sending CMD13, stop command (CMD12) will be sent. If we enable prog done interrupt for CMD12, then CMD13 polling can be avoided. The prog done interrupt means that the card is done with its programming and is ready for next request. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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由 Sahitya Tummala 提交于
In the context of request processing thread, data mover lock is acquired after the host lock. In another context, in the completion handler of data mover the locks are acquired in the reverse order, resulting in possible circular lock dependency warning. Hence, schedule a tasklet to process the dma completion so as to avoid nested locks. Signed-off-by: NSahitya Tummala <stummala@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 20 12月, 2010 2 次提交
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由 Linus Walleij 提交于
I misread the datasheet as if bypass mode was not available at all on the ux500's, I was wrong. It is there, the datasheet just states that you should not have to use it. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
The Ux500 variant of this block has a different divider. The value used right now is too big and which means a loss in performance. This fix corrects it. Also expand the math comments a bit so it's clear what's happening. Further the Ux500 variant does not like if we use the BYPASS bit, instead we are supposed to set the clock divider to zero. Signed-off-by: NUlf Hansson <ulf.hansson@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 11月, 2010 3 次提交
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由 Guennadi Liakhovetski 提交于
The MMCIF controller on sh-mobile platforms can use the DMA controller for data transfers. Interface to the SH dmaengine driver to enable DMA. We also have to lower the maximum number of segments to match with the number od DMA descriptors on SuperH, this doesn't significantly affect driver's PIO performance. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Replace pr_* with respective dev_*, sort headers alphabetically, remove an unused struct member, superfluous variable initialisations and type-casts. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
In sh_mmcif.c an event is used as a completion, switch over. When a wait_for_completion*_timeout() returns, it suffices to check the remaining time, setting an additional flag before waking up the waiting task only reduces the race window, but does not eliminate it. This patch switches the driver to use a completion to signal an interrupt, the only case, when an interrupt should not wake up the waiter, is when an automatic CMD12 completes. Also fix MODULE_ALIAS. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 23 11月, 2010 1 次提交
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由 Philip Rakity 提交于
We now: * check for a v3 controller before setting 8-bit bus width * offer a callback for platform code to switch to 8-bit mode, which allows non-v3 controllers to support it * rely on mmc->caps |= MMC_CAP_8_BIT_DATA; in platform code to specify that the board designers have indeed brought out all the pins for 8-bit to the slot. We were previously relying only on whether the *controller* supported 8-bit, which doesn't tell us anything about the pin configuration in the board design. This fixes the MMC card regression reported by Maxim Levitsky here: http://thread.gmane.org/gmane.linux.kernel.mmc/4336 by no longer assuming that 8-bit works by default. Signed-off-by: NPhilip Rakity <prakity@marvell.com> Tested-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 20 11月, 2010 1 次提交
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由 Ohad Ben-Cohen 提交于
Some board/card/host configurations are not capable of powering off the card after boot. To support such configurations, and to allow smoother transition to runtime PM behavior, MMC_CAP_POWER_OFF_CARD is added, so hosts need to explicitly indicate whether it's OK to power off their cards after boot. SDIO core will enable runtime PM for a card only if that cap is set. As a result, the card will be powered down after boot, and will only be powered up again when a driver is loaded (and then it's up to the driver to decide whether power will be kept or not). This will prevent sdio_bus_probe() failures with setups that do not support powering off the card. Reported-and-tested-by: NDaniel Drake <dsd@laptop.org> Reported-and-tested-by: NArnd Hannemann <arnd@arndnet.de> Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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