With the bus-width test patch, mmc_set_bus_width*() isn't called properly
when the driver doesn't set MMC_CAP_BUS_WIDTH and no DDR mode.
This patch fixes the regression by moving the call up before the cap test.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This adds the mmc host driver for the Synopsys DesignWare mmc
host controller, found in a number of embedded SoC designs.
Signed-off-by: NWill Newton <will.newton@imgtec.com>
Reviewed-by: NMatt Fleming <matt@console-pimps.org>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

SDHCI driver for Tegra. This driver plugs in as a new variant of
sdhci-pltfm, using the platform data structure passed in to specify the
GPIOs to use for card detect, write protect and card power enablement.

Original driver (of which only the header file is left):
Signed-off-by: NYvonne Yip <y@palm.com>

The rest, which has been rewritten by now:
Signed-off-by: NOlof Johansson <olof@lixom.net>
Reviewed-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some controllers misparse segment length 0 as being 0, not 65536. Add
a quirk to deal with it.
Signed-off-by: NOlof Johansson <olof@lixom.net>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Since we make sure the clock is enabled in the mmc_host_clk_exit()
function we should expect a reference counter of 1, not 0.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Tested-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch supports controllers with no internal clock divider in SDHCI,
such as the s5pc210 board.  The external clock divider can be used to
make a proper clock because SDHCI doesn't support internal clock divider
by itself.

If external clock divider type is selected, some functions related
to clock control will be overrided by other functions.

The current clock control index is added to let you know which
clock bus is used for SDHCI when overriding functions.

Checking functions are added into sdhci_s3c_consider_clock, because
the clock divider step is different from that of host controller.
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds support for additional host capabilities like SD/MMC
high speed, SDHCI bus width, etc.
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NTakashi Iwai <tiwai@suse.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some old MMC devices fail with the 4/8 bits the driver tries to use
exclusively.  This patch adds a test for the given bus setup and falls
back to the lower bit mode (until 1-bit mode) when the test fails.

[Major rework and refactoring by tiwai]
[Quirk addition and many fixes by prakity]
Signed-off-by: NAries Lee <arieslee@jmicron.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Tested-by: NPhilip Rakity <prakity@marvell.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In case of failure, mmc_attach_sdio() will power off the SD bus.
Power it up and reinitialize before trying SD memory detection.
Reported-by: NSahitya Tummala <stummala@codeaurora.org>
Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Upon system resume, SDIO core must reinitialize cards that were
powered off during suspend.

If the card had its power kept during suspend (and thus it is
'powered-resumed'), SDIO core performs only a limited reinitializing,
mainly needed to make sure that the card wasn't removed/replaced.

If a __nonremovable__ card is powered-resumed, we can safely skip the
reinitializing phase.

Note: 9b966aae (mmc: sdio: fully reconfigure oldcard on resume) removed
the bus width reconfiguration since mmc_sdio_init_card already does it.
It is brought back now in case mmc_sdio_init_card is skipped.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Initial SDIO runtime PM implementation took a conservative approach
of powering up cards (and fully reinitializing them) on system suspend,
just before the suspend handlers of the relevant drivers were executed.

To avoid redundant power and reinitialization cycles, this patch removes
this behavior: if a card is already powered off when system suspend kicks
in, it is left at that state.

If a card is active when a system sleep starts, everything is
straightforward and works exactly like before. But if the card was
already suspended before the sleep began, then when the MMC core powers
it back up on resume, its run-time PM status has to be updated to reflect
the actual post-system sleep status.

The technique to do that is borrowed from the I2C runtime PM
implementation (for more info see Documentation/power/runtime_pm.txt).
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

mmc_rescan() checks whether registered cards are still present before
skipping them, by calling the bus-specific ->detect() handler.

With buses that support runtime PM, the card may be powered off at
this point, so they need to be powered on and fully reinitialized before
->detect() executes.

This whole process is redundant with nonremovable cards; in those cases,
we can safely skip calling ->detect() and implicitly assume its success.
Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

JMicron 388 SD/MMC combo controller supports the 1.8V low-voltage for
SD, but MMC doesn't work with the low-voltage, resulting in an error
at probing.

This patch adds the support for multiple voltage mask per device type,
so that SD works with 1.8V while MMC forces 3.3V.  Here new ocr_avail_*
fields for each device are introduced, so that the actual OCR mask is
switched dynamically.

Also, the restriction of low-voltage in core/sd.c is removed when the
bit is allowed explicitly via ocr_avail_sd mask.

This patch was rewritten from scratch based on Aries' original code.
Signed-off-by: NAries Lee <arieslee@jmicron.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

More information should be shown when sdhci_dumpregs is called.
Knowing the command is useful for debugging, and Capability 1
is useful for SD v3.
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch modifies the MMC core code to optionally call the set_ios()
operation on the driver with the clock frequency set to 0 (gate) after
a grace period of at least 8 MCLK cycles, then restore it (ungate)
before any new request. This gives the driver the option to shut down
the MCI clock to the MMC/SD card when the clock frequency is 0, i.e.
the core has stated that the MCI clock does not need to be generated.

It is inspired by existing clock gating code found in the OMAP and
Atmel drivers and brings this up to the host abstraction.  Gating is
performed before and after any MMC request.

This patchset implements this for the MMCI/PL180 MMC/SD host controller,
but it should be simple to switch OMAP/Atmel over to using this instead.

mmc_set_{gated,ungated}() add variable protection to the state holders
for the clock gating code.  This is particularly important when ordinary
.set_ios() calls would race with the .set_ios() call resulting from a
delayed gate operation.
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Reviewed-by: NChris Ball <cjb@laptop.org>
Tested-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch disables the broken ADMA on selected O2Micro devices.
Signed-off-by: NJennifer Li <Jennifer.li@o2micro.com>
Reviewed-by: NChris Ball <cjb@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Remove release_resource() after release_mem_region().
Signed-off-by: NAxel Lin <axel.lin@gmail.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

This also fixes the build problem introduced by my previous patch
due to unhandled API changes introduced by commit:
 99fc5131 (mmc: Move regulator handling closer to core)
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This implementation is based on the pxamci.c driver and it will
be used to support the mx31_3ds machine.
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

Implement an sdhci-pltfm driver for the controller found in the
Marvell Dove SoC.
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
CC: Saeed Bishara <saeed@marvell.com>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

There was a semi-colon missing and it broke the compile.
Signed-off-by: NDan Carpenter <error27@gmail.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Running the latest kernel on the 4430SDP board with DMA API debugging
enabled results in this:

WARNING: at lib/dma-debug.c:803 check_unmap+0x19c/0x6f0()
NULL NULL: DMA-API: device driver tries to free DMA memory it has not allocated
[device address=0x000000008129901a] [size=260 bytes]
Modules linked in:
Backtrace:
[<c003cbe0>] (dump_backtrace+0x0/0x10c) from [<c0278da8>] (dump_stack+0x18/0x1c)
 r7:c1839dc0 r6:c0198578 r5:c0304b17 r4:00000323
[<c0278d90>] (dump_stack+0x0/0x1c) from [<c005b158>] (warn_slowpath_common+0x58/0x70)
[<c005b100>] (warn_slowpath_common+0x0/0x70) from [<c005b214>] (warn_slowpath_fmt+0x38/0x40)
 r8:c1839e40 r7:00000000 r6:00000104 r5:00000000 r4:8129901a
[<c005b1dc>] (warn_slowpath_fmt+0x0/0x40) from [<c0198578>] (check_unmap+0x19c/0x6f0)
 r3:c03110de r2:c0304e6b
[<c01983dc>] (check_unmap+0x0/0x6f0) from [<c0198cd8>] (debug_dma_unmap_page+0x74/0x80)
[<c0198c64>] (debug_dma_unmap_page+0x0/0x80) from [<c01d5ad8>] (omap2_mcspi_work+0x514/0xbf0)
[<c01d55c4>] (omap2_mcspi_work+0x0/0xbf0) from [<c006dfb0>] (process_one_work+0x294/0x400)
[<c006dd1c>] (process_one_work+0x0/0x400) from [<c006e50c>] (worker_thread+0x220/0x3f8)
[<c006e2ec>] (worker_thread+0x0/0x3f8) from [<c00738d0>] (kthread+0x88/0x90)
[<c0073848>] (kthread+0x0/0x90) from [<c005e924>] (do_exit+0x0/0x5fc)
 r7:00000013 r6:c005e924 r5:c0073848 r4:c1829ee0
---[ end trace 1b75b31a2719ed20 ]---

I've no idea why this driver uses NULL for dma_unmap_single instead of
the &spi->dev that is laying around just waiting to be used in that
function - but it's an easy fix.

Also replace this comment with a FIXME comment:
                /* Do DMA mapping "early" for better error reporting and
                 * dcache use.  Note that if dma_unmap_single() ever starts
                 * to do real work on ARM, we'd need to clean up mappings
                 * for previous transfers on *ALL* exits of this loop...
                 */
as the comment is not true - we do work in dma_unmap() functions,
particularly on ARMv6 and above.  I've corrected the existing unmap
functions but if any others are required they must be added ASAP.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The test "if (spi_imx->irq <= 0)" is not testing the IRQ value, but
the return value of platform_get_irq().  As platform_get_irq() can
return an error (-ENXIO) or the IRQ value it found, the test should be
"if (spi_imx->irq < 0)"

[grant.likely: Note: In general, Linux irq number 0 should also mean
no irq, but arm still allows devices to be assigned 0, and the imx
platform uses 0 for one of the spi devices, so this patch is needed
for the device to work]
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Minor formatting fixup since the information which core was associated
with the MCE is not always valid.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Building for X86_32 produces shift count warnings, so use BIT_64() to
eliminate the warnings.

drivers/edac/mce_amd.c:778: warning: left shift count >= width of type
drivers/edac/mce_amd.c:778: warning: left shift count >= width of type
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Cc: Doug Thompson <dougthompson@xmission.com>
Cc: bluesmoke-devel@lists.sourceforge.net
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Now that everything is inplace, enable MCE decoding on F15h. Make
initcall routine a bit more readable.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

F15h adds a sixth MCE bank: adjust bank number check in the injection
code.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Shorten up MCi_STATUS flags and add BD's new deferred and poison types.
Also, simplify formatting.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Make macro names shorter thus making code shorter and more clear.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Add decoder for FP MCEs.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Integrate the single FIROB signature into an expanded table along with
the new BD MCE types.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

by (almost) reusing the F10h one since the signatures are the same.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

F15h BD doesn't generate LS MCEs so warn about it.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

MCE bank 2 is redefined from a BU to a CU (Combined Unit) bank on F15h.
Add a decoder function for CU MCEs.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Add support for decoding F15h IC MCEs.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

Add a decoder for F15h DC MCEs to support the new types of DC MCEs
introduced by the BD microarchitecture.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

F15h enlarges the extended error code of an MCE to a 5-bit field
(MCi_STATUS[20:16]). Add a mask variable which default 0xf is overridden
on F15h.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>

K8 does not allow for an atomic RMW to a cacheline as F10h does so
disable the error injection interface for it.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>