1. 23 5月, 2012 1 次提交
    • D
      i915: add dmabuf/prime buffer sharing support. · 1286ff73
      Daniel Vetter 提交于
      This adds handle->fd and fd->handle support to i915, this is to allow
      for offloading of rendering in one direction and outputs in the other.
      
      v2 from Daniel Vetter:
      - fixup conflicts with the prepare/finish gtt prep work.
      - implement ppgtt binding support.
      
      Note that we have squat i-g-t testcoverage for any of the lifetime and
      access rules dma_buf/prime support brings along. And there are quite a
      few intricate situations here.
      
      Also note that the integration with the existing code is a bit
      hackish, especially around get_gtt_pages and put_gtt_pages. It imo
      would be easier with the prep code from Chris Wilson's unbound series,
      but that is for 3.6.
      
      Also note that I didn't bother to put the new prepare/finish gtt hooks
      to good use by moving the dma_buf_map/unmap_attachment calls in there
      (like we've originally planned for).
      
      Last but not least this patch is only compile-tested, but I've changed
      very little compared to Dave Airlie's version. So there's a decent
      chance v2 on drm-next works as well as v1 on 3.4-rc.
      
      v3: Right when I've hit sent I've noticed that I've screwed up one
      obj->sg_list (for dmar support) and obj->sg_table (for prime support)
      disdinction. We should be able to merge these 2 paths, but that's
      material for another patch.
      
      v4: fix the error reporting bugs pointed out by ickle.
      
      v5: fix another error, and stop non-gtt mmaps on shared objects
      stop pread/pwrite on imported objects, add fake kmap
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1286ff73
  2. 22 5月, 2012 1 次提交
  3. 20 5月, 2012 3 次提交
  4. 10 5月, 2012 1 次提交
    • D
      drm/i915: enable semaphores on gen6 if dmar is not active · 59de3295
      Daniel Vetter 提交于
      Inspired by the recent ppgtt regression report, where switching of
      dmar only for the gpu seems to fix things completely, I've looked
      again at the semaphores+vt-d situation.
      
      Contrary to my earlier testing a few months back my system is now
      stable with dmar disabled for the igd, and not only when disabling
      dmar completely.
      
      So I'm rather hopeful that all our recent fixes for snb have changed
      things for code and it's time to try enabling semaphores again. We've
      also had issues with enabling semaphores which are not vt-d related,
      but I guess these are all fixed by the autoreport-disabling and lazy
      request fix. And there's only one way to find out whether there are
      still other issues ...
      
      When I've tried to apply this patch I've noticed that semaphores on
      gen6 have already silently been enabled in
      
      commit 2911a35b
      Author: Ben Widawsky <ben@bwidawsk.net>
      Date:   Thu Apr 5 14:47:36 2012 -0700
      
          drm/i915: use semaphores for the display plane
      
      Fix this up by only checking whether dmar is enabled on the gfx (not
      on the entire system).
      Reviewed-by: NBen Widawsky <ben@bwidawsk.net>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      59de3295
  5. 06 5月, 2012 8 次提交
  6. 03 5月, 2012 2 次提交
  7. 13 4月, 2012 2 次提交
    • D
      drm/i915: re-init modeset hw state after gpu reset · f817586c
      Daniel Vetter 提交于
      After a gpu reset we need to re-init some of the hw state we only
      initialize when modeset is enabled, like rc6, hw contexts or render/GT
      core clock gating and workaround register settings.
      
      Note that this patch has a small change in the resume code:
      - rc6 on gen6+ is only restored for the modeset case (for more
        consistency with other callsites). This is no problem because recent
        kernels refuse to load drm/i915 without kms on gen6+
      - rc6/emon on ilk is only restored for the modeset case. This is no
        problem because rc6 is disabled by default on ilk, and ums on ilk
        has never really been a supported option outside of horrible rhel
        backports.
      
      v2: Chris Wilson noticed that we not only fail to restore the clock
      gating settings after gpu reset.
      
      v3: Move the call to modeset_init_hw in _reset out of the
      struct_mutext protected area - other callers don't hold it, too.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f817586c
    • B
      drm/i915: use semaphores for the display plane · 2911a35b
      Ben Widawsky 提交于
      In theory this will have performance and power improvements. Performance
      because we don't need to stall when the scanout BO is busy, and power
      because we don't have to stall when the BO is busy (and the ring can
      even go to sleep if the HW supports it).
      
      v2:
      squash 2 patches into 1 (me)
      un-inline the enable_semaphores function (Daniel)
      remove comment about SNB hangs from i915_gem_object_sync (Chris)
      rename intel_enable_semaphores to i915_semaphore_is_enabled (me)
      removed page flip comment; "no why" (Chris)
      
      To address other comments from Daniel (irc):
      update the comment to say 'vt-d is crap, don't enable semaphores'
        - I think you misinterpreted Chris' comment, it already exists.
      checking out whether we can pageflip on the render ring on ivb (didn't
      work on early silicon)
        - We don't want to enable workarounds for early silicon unless we have
          to.
        - I can't find any references in the docs about this.
      optionally use it if the fb is already busy on the render ring
        - This should be how the code already worked, unless I am
          misunderstanding your meaning.
      Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2911a35b
  8. 12 4月, 2012 1 次提交
  9. 10 4月, 2012 3 次提交
  10. 03 4月, 2012 1 次提交
  11. 02 4月, 2012 2 次提交
  12. 01 4月, 2012 1 次提交
  13. 29 3月, 2012 3 次提交
  14. 24 3月, 2012 1 次提交
  15. 23 3月, 2012 1 次提交
  16. 02 3月, 2012 1 次提交
  17. 12 2月, 2012 2 次提交
  18. 10 2月, 2012 1 次提交
  19. 09 2月, 2012 1 次提交
    • D
      drm/i915: swizzling support for snb/ivb · f691e2f4
      Daniel Vetter 提交于
      We have to do this manually. Somebody had a Great Idea.
      
      I've measured speed-ups just a few percent above the noise level
      (below 5% for the best case), but no slowdows. Chris Wilson measured
      quite a bit more (10-20% above the usual snb variance) on a more
      recent and better tuned version of sna, but also recorded a few
      slow-downs on benchmarks know for uglier amounts of snb-induced
      variance.
      
      v2: Incorporate Ben Widawsky's preliminary review comments and
      elaborate a bit about the performance impact in the changelog.
      
      v3: Add a comment as to why we don't need to check the 3rd memory
      channel.
      
      v4: Fixup whitespace.
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NBen Widawsky <ben@bwidawsk.net>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f691e2f4
  20. 20 1月, 2012 4 次提交