Add HD Audio Device PCI ID for the Intel Braswell platform.
It is an HDA Intel PCH controller.

AZX_DCAPS_ALIGN_BUFSIZE is not necessary for this controller.
Signed-off-by: NLibin Yang <libin.yang@intel.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Since devptr can be NULL due to asynchronous probe, all PM ops should
have NULL checks at the beginning.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

When the initialization of Intel HDMI controller fails due to missing
i915 kernel symbols (e.g. HD-audio is built in while i915 is module),
the driver discontinues the probe.  However, since the probe was done
asynchronously, the driver object still remains, thus the relevant PM
ops are still called at suspend/resume. This results in the bad access
to the incomplete audio card object, eventually leads to Oops or stall
at PM.

This patch adds the missing checks of chip->init_failed flag at each
PM callback in order to fix the problem above.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=79561
Cc: <stable@vger.kernel.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

We got a regression report for 3.15.x kernels, and this turned out to
be triggered by the fix for stream assignment order.  On reporter's
machine with Intel controller (8086:1e20) + VIA VT1802 codec, the
first playback slot can't work with speaker outputs.

But the original commit was actually a fix for AMD controllers where
no proper GCAP value is returned, we shouldn't revert the whole
commit.  Instead, in this patch, a new flag is introduced to determine
the stream assignment order, and follow the old behavior for Intel
controllers.

Fixes: dcb32ecd ('ALSA: hda - Do not assign streams in reverse order')
Reported-and-tested-by: NSteven Newbury <steve@snewbury.org.uk>
Cc: <stable@vger.kernel.org> [v3.15+]
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK
by programming the M/N values as per the core display clock (CDCLK) queried from
i915 display driver.

And the audio driver will also set BCLK in azx_first_init() since the display
driver can turn off the shared power in boot phase if only eDP is connected
and M/N values will be lost and must be reprogrammed.
Signed-off-by: NMengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

ICH6_ prefix doesn't mean that it's specific to ICH6 chipset but
rather its generic for all HD-audio (or "Azalia") devices.
Use AZX_ prefix instead to align with other constants.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The defined numbers of SDs are specific to hda-intel, so move them to
there.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The very same notifier code is used in both hda_intel.c and
hda_tegra.c.  Move it to the generic code.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Just move struct fields between struct azx and struct hda_intel, and
move some definitions from hda_priv.h to hda_intel.c.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

... and move most parts into hda_intel.c from the generic controller
code.  This is a clean up, and there should be no functional change by
this patch.

Now, struct azx obtains the generic callbacks for getting the position
and the delay.  As default NULL, posbuf is read.  These replace the
old position_fix[], and each is implemented as a callback.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

For Intel Haswell/Broadwell display HD-A controller, the 24MHz HD-A link BCLK
is converted from Core Display Clock (CDCLK): BCLK = CDCLK * M / N
And there are two registers EM4 and EM5 to program M, N value respectively.
The EM4/EM5 values will be lost and when the display power well is disabled.

BIOS programs CDCLK selected by OEM and EM4/EM5, but BIOS has no idea about
display power well on/off at runtime. So the M/N can be wrong if non-default
CDCLK is used when the audio controller resumes, which results in an invalid
BCLK and abnormal audio playback rate. So this patch saves and restores valid
M/N values on controller suspend/resume.

And 'struct hda_intel' is defined to contain standard HD-A 'struct azx' and
Intel specific fields, as Takashi suggested.
Signed-off-by: NMengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

When a machine is booted with nomodeset option, i915 driver skips the
whole initialization.  Meanwhile, HD-audio tries to bind wth i915 just
by request_symbol() without knowing that the initialization was
skipped, and eventually it hits WARN_ON() in i915_request_power_well()
and i915_release_power_well() wrongly but still continues probing,
even though it doesn't work at all.

In this patch, both functions are changed to return an error in case
of uninitialized state instead of WARN_ON(), so that HD-audio driver
can give up HDMI controller initialization at the right time.
Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Cc: <stable@vger.kernel.org> [3.15]
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This reverts commit 7189eb9b.

It will use LPIB to get the DMA position on Broadwell HDMI Audio.
Signed-off-by: NLibin Yang <libin.yang@intel.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Broadwell HDMI can't use position buffer reliably, force to use LPIB
Signed-off-by: NLibin Yang <libin.yang@intel.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The recent Intel H97/Z97 chipsets need the similar setups like other
Intel chipsets for snooping, etc.  Especially without snooping, the
audio playback stutters or gets corrupted.  This fix patch just adds
the corresponding PCI ID entry with the proper flags.
Reported-and-tested-by: NArthur Borsboom <arthurborsboom@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

We should prefer `const struct pci_device_id` over
`DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines.
This issue was reported by checkpatch.

A simplified version of the semantic patch that makes this change is as
follows (http://coccinelle.lip6.fr/):

// <smpl>

@@
identifier i;
declarer name DEFINE_PCI_DEVICE_TABLE;
initializer z;
@@

- DEFINE_PCI_DEVICE_TABLE(i)
+ const struct pci_device_id i[]
= z;

// </smpl>

It has been tested by compilation.
Signed-off-by: NBenoit Taine <benoit.taine@lip6.fr>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Broadwell display controller has 3 stream DMA engines. DMA0 cannot update DMA
postion buffer properly while DMA1 and DMA2 can work well. So this patch masks
the buggy DMA0 by keeping it as opened.

This is a tentative workaround, so keep the change small as Takashi suggested.
Signed-off-by: NMengdong Lin <mengdong.lin@intel.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The recent commit (ca460f86) changed the CORB RP reset procedure to
follow the specification with a couple of sanity checks.
Unfortunately, Nvidia controller chips seem not following this way,
and spew the warning messages like:
  snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0

This patch adds the workaround for such chips.  It just skips the new
reset procedure for the known broken chips.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The full_reset argument to azx_init_chip() carries boolean rather than
numerical information, so update the type to reflect that.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The ops to read and write registers should take pointers labeled as
__iomem.  Thanks to the sparse bot for catching this.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Using readl, writel, etc. resulted in some architectures, such as
s390, expanding the member names into zpci_writel.  Obviously not the
intended result.

Fixes s390 build breakage introduced by "40830813 - ALSA: hda - Allow
different ops to read/write registers"
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Codec creation and stream initialization can be shared between
hda_intel and hda platform drivers.  Move it and the static functions
it depends on to hda_controller.c.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This code will be reused by an hda_platform driver as it has no PCI
dependencies.  This allows update_rirb to be static as all users are
now in hda_controller.c.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This op will be used by hda_intel to do the position check.  Takashi
wisely suggested adding this before moving the interrupt handler to
common HDA code.  Having this callback prevents the need to move the
hda_intel specific delayed interrupt handling with the irq.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Share more code from hda_intel.  This moves the link control and
initialization to hda_controller.  The code will also be used by an
hda platform driver.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Combining the call to alloc_cmd_io with the allocate pages function
removes an extra interface between hda_intel and hda_controller.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This is done to allow an HDA platform driver to reuse the code.

A few of the interfaces added to hda_controller will disappear in
following commits as their users are also moved to hda_controller.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Moving the DSP loading functionality to hda_controller.c means that
the dsp lock doesn't need to be shared in hda_intel and
hda_controller.  The forthcoming platform driver doesn't need the DSP
loading code, but sharing it doesn't hurt.

Tested on Chromebook Pixel's ca0132 that uses the DSP loader.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Pull allocation from first_init to a new function in hda_controller.c.
Short term this will allow the dsp loader to be moved as well.  In
later commits it will allow the same allocation to be used by the
platform hda driver.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Pull the pcm_ops and the functions they use into a new hda_controller
file.  This is done to allow for other hda implementations besides PCI
to use the same ops.  The hda_controller file will house functionality
related to HDA but independent of the bus used to talk to the
controller.

This currently shares dsp locking across the two files.  This will be
remedied in a following commit.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Adding this op allows the X86 specific mmap operation to help in
hda_intel without needing a CONFIG_X86 in future non-PCI hda drivers.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Break out the allocation of pages for DMA and PCM buffers to ops in
the chip structure.  This is done to allow for architecture specific
work-arounds to be added.  Currently mark_pages_wc is used by
hda_intel.  This avoids needing to move that x86-specific code to a
common area shared with hda platform drivers.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Passing the max slots and power save arguments to codec_create will
allow for its reuse by an hda_platform driver. It makes the function
independent of the module params in hda_intel and ready to move to
hda_shared in a following commit.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Keeping a pointer to the jackpoll_ms array in the chip will allow
azx_codec_create to be shared between hda_intel and hda_platform
drivers.  Also modify get_jackpoll_ms to make the jackpoll_ms member
optional, this way a platform driver can leave it out if it's not
needed.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Although the code was updated last year the "#if 0" surrounding it
dates back to the original git commit.  The function will be moved to
a new file, no need to carry the dead code.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This is a PCI-only feature, but adding a callback for it in the chip
structure breaks the PCI dependency in the RIRB code allowing the
logic there to be re-used by the platform HDA driver.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This removes calls to get the device via PCI from other parts of the
code that will be able to be re-used by the platform driver.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

This will allow for a platform hda driver to use it as well.  It
removes the dependency on the module param from hda_intel, which will
allow for azx_setup_periods to be shared.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

The forthcoming platform hda driver needs to override the way
registers are read and written.  In preparation for that, introduce a
reg_ops struct that can be implemented differently by the new driver.
Change the existing macros to use the new structure, and move them to
hda_priv.h where they will be accessible to both PCI and platform
drivers.

Start with register access, but later commits will add more ops that
differ between PCI and platform.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>

Later commits adding support for hda platform drivers will want to use
the same defines and structures. Put them in a place reachable by both
hda_intel and the new platform driver.

This is a mostly a direct copy with a few whitespace and comment
changes to make checkpatch happy.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>