- 16 1月, 2012 1 次提交
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由 Rob Herring 提交于
BSYM macro is only needed for assembly files and its usage in c files is wrong, so remove it. The linker will correctly set bit 0 for Thumb2 kernels. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Dave Martin <dave.martin@linaro.org> Cc: Kukjin Kim <kgene.kim@samsung.com>
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- 06 11月, 2011 2 次提交
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由 Kukjin Kim 提交于
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This reverts commit 4bd0fe1c. This implementation can introduce a problem and 'ARM: SMP: fix per cpu timer setup before the cpu is marked online' patch can solve the cpu_oneline vs. cpu_active problem so that should be reverted. Signed-off-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 10月, 2011 1 次提交
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由 Russell King 提交于
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 10月, 2011 1 次提交
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由 Will Deacon 提交于
This patch uses the new cpu_logical_map() macro for converting logical CPU numbers into physical numbers when dealing with the pen_release variable in the SMP boot and CPU hotplug paths. Cc: Kukjin Kim <kgene.kim@samsung.com> Tested-and-acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 04 10月, 2011 1 次提交
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由 Changhwan Youn 提交于
This patch adds two functions for gic interrupt handling. 1. Add interrupt handling of 4 cores. 2. Dynamically set gic bank offset according to the type of soc. Gic bank offset of EXYNOS4412 is 0x4000 while the offset of EXYNOS4210 and EXYNOS4212 is 0x8000. This patch is necessary because EXYNOS4 socs cannot support GIC register banking as described in commit aab74d3e. Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 15 9月, 2011 1 次提交
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由 Kukjin Kim 提交于
The commit 5dfc54e0 ("ARM: GIC: avoid routing interrupts to offline CPUs") prevents routing interrupts to offline CPUs. But in case of timer on EXYNOS4, the irq_set_affinity() method is called in percpu_timer_setup() before CPU1 becomes online. So this patch fixes routing timer interrupt to offline CPU. Reported-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 24 8月, 2011 1 次提交
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由 Kukjin Kim 提交于
This patch uses samsung_rev() to support variable silicon revision of EXYNOS4210 so that can support for EXYNOS4210 REV0, REV1.0 and REV1.1. Note: Need to change timer setting on REV0. Acked-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 20 7月, 2011 2 次提交
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由 JungHi Min 提交于
To insert the code for power on/off with pmu control to support hotplug in/out core1 As for hotplug.c, the codes for core1 to be hotplug in/out is inserted. As for regs-pmu.h, S5P_CORE_LOCAL_PWR_EN is defined. As for platsmp.c, the codes for core1 to be powered on is inserted. Signed-off-by: NJungHi Min <junghi.min@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Changhwan Youn 提交于
For full support of power modes, this patch adds implementation external GIC on EXYNOS4. External GIC of Exynos4 cannot support register banking so several interrupt related code for CPU1 should be different from that of CPU0. Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 07 7月, 2011 1 次提交
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由 Stephen Boyd 提交于
If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 1 次提交
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由 Russell King 提交于
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 2月, 2011 1 次提交
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由 Kukjin Kim 提交于
This patch adds EXYNOS4 CPU support files in mach-exynos4, and basically they are moved from mach-s5pv310 so that it can support Samsung's new CPU name, EXYNOS4. The EXYNOS4 ingegrates a ARM Cortex A9 multi-core. Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 20 12月, 2010 4 次提交
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由 Russell King 提交于
There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 12月, 2010 1 次提交
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由 Russell King 提交于
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 12月, 2010 1 次提交
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由 Russell King 提交于
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 8月, 2010 1 次提交
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由 Changhwan Youn 提交于
Following occurs on boot message without this patch. CPU1: processor failed to boot Brought up 1 CPUs SMP: Total of 1 processors activated... This patch adds SYSRAM mapping for fixing Secondary CPU startup. CPU1: Booted secondary processor Brought up 2 CPUs SMP: Total of 2 processors activated... Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 05 8月, 2010 1 次提交
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由 Changhwan Youn 提交于
This patch adds Samsung S5PV310/S5PC210 CPU support. The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core. Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NJongpill Lee <boyko.lee@samsung.com> Signed-off-by: NJiseong Oh <jiseong.oh@samsung.com> [kgene.kim@samsung.com: fix build errors] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 02 5月, 2010 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 11月, 2009 1 次提交
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由 Colin Tuckley 提交于
The platsmp.c file defines the REALVIEW_SYS_FLAGS* macros which are already present in platform.h. Just use the latter. Signed-off-by: NColin Tuckley <colin.tuckley@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 24 7月, 2009 1 次提交
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由 Catalin Marinas 提交于
This patch sets bit 0 in the startup address passed to the secondary CPUs so that they branch into Thumb-2 mode. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 30 5月, 2009 1 次提交
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由 Colin Tuckley 提交于
This is a RealView platform supporting core tiles with ARM11MPCore, Cortex-A8 or Cortex-A9 (multicore) processors. It has support for MMC, CompactFlash, PCI-E. Signed-off-by: NColin Tuckley <colin.tuckley@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 28 5月, 2009 1 次提交
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由 Russell King 提交于
Convert cpu_*_mask bit twiddling to the new set_cpu_*() API. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 5月, 2009 4 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The SCU can be used by non-realview platforms, so make it visible for other people to use rather than having them copy the header file. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Having discussed broadcast tick support with Thomas Glexiner, the broadcast tick devices should be registered with a higher rating than the global tick device, and it should have the ONESHOT and PERIODIC feature flags set. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Acked-by: NThomas Glexiner <tglx@linutronix.de>
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- 17 5月, 2009 2 次提交
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由 Russell King 提交于
smp_cross_call_done() is a no-op for MPCore, and since it's only used by platform code, there's no point in having it unless it's doing something. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The ARM SMP code wasn't properly updated for the cpumask changes, which results in smp_timer_broadcast() broadcasting ticks to non-online CPUs. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 1月, 2009 1 次提交
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由 Russell King 提交于
arch/arm/mach-realview/platsmp.c:140: error: 'jiffies' undeclared (first use in this function) drivers/amba/bus.c:246: error: 'NO_IRQ' undeclared (first use in this function) Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 12月, 2008 3 次提交
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由 Catalin Marinas 提交于
Some of the calls weren't necessary and some others were duplicated. This patch tidies up the platsmp.c file. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Catalin Marinas 提交于
All the cases where the local timer for a CPU is accessed happen on the corresponding current CPU, hence no need to access the per-CPU local timer mappings. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Jon Callan 提交于
This patch adds the necessary definitions and Kconfig entries to enable Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board. Signed-off-by: NJon Callan <Jon.Callan@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 06 9月, 2008 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 8月, 2008 2 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 7月, 2008 1 次提交
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由 Catalin Marinas 提交于
This patch annotates the platform_secondary_init function in arch/arm/mach-realview/platsmp.c with trace_hardirqs_off to avoid a warning when LOCKDEP and TRACE_IRQFLAGS are enabled. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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