1. 19 6月, 2013 1 次提交
  2. 14 5月, 2013 1 次提交
  3. 25 3月, 2013 1 次提交
  4. 22 3月, 2013 2 次提交
    • R
      ACPI / LPSS: Add support for exposing LTR registers to user space · 2e0f8822
      Rafael J. Wysocki 提交于
      Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have
      registers providing access to LTR (Latency Tolerance Reporting)
      functionality that allows software to monitor and possibly influence
      the aggressiveness of the platform's active-state power management.
      
      For each LPSS device, there are two modes of operation related to LTR,
      the auto mode and the software mode.  In the auto mode the LTR is
      set up by the platform firmware and managed by hardware.  Software
      can only read the LTR register values to monitor the platform's
      behavior.  In the software mode it is possible to use LTR to control
      the extent to which the platform will use its built-in power
      management features.
      
      This changeset adds support for reading the LPSS devices' LTR
      registers and exposing their values to user space for monitoring and
      diagnostics purposes.  It re-uses the MMIO mappings created to access
      the LPSS devices' clock registers for reading the values of the LTR
      registers and exposes them to user space through sysfs device
      attributes.  Namely, a new atrribute group, lpss_ltr, is created for
      each LPSS device.  It contains three new attributes: ltr_mode,
      auto_ltr, sw_ltr.  The value of the ltr_mode attribute reflects the
      LTR mode being used at the moment (software vs auto) and the other
      two contain the actual register values (raw) whose meaning depends
      on the LTR mode.  All of these attributes are read-only.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      2e0f8822
    • R
      ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices · f58b082a
      Rafael J. Wysocki 提交于
      Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have some
      common features that aren't shared with any other platform devices,
      including the clock and LTR (Latency Tolerance Reporting) registers.
      It is better to handle those features in common code than to bother
      device drivers with doing that (I/O functionality-wise the LPSS
      devices are generally compatible with other devices that don't
      have those special registers and may be handled by the same drivers).
      
      The clock registers of the LPSS devices are now taken care of by
      the special clk-x86-lpss driver, but the MMIO mappings used for
      accessing those registers can also be used for accessing the LTR
      registers on those devices (LTR support for the Lynxpoint LPSS is
      going to be added by a subsequent patch).  Thus it is convenient
      to add a special ACPI scan handler for the Lynxpoint LPSS devices
      that will create the MMIO mappings for accessing the clock (and
      LTR in the future) registers and will register the LPSS devices'
      clocks, so the clk-x86-lpss driver will only need to take care of
      the main Lynxpoint LPSS clock.
      
      Introduce a special ACPI scan handler for Intel Lynxpoint LPSS
      devices as described above.  This also reduces overhead related to
      browsing the ACPI namespace in search of the LPSS devices before the
      registration of their clocks, removes some LPSS-specific (and
      somewhat ugly) code from acpi_platform.c and shrinks the overall code
      size slightly.
      Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      Acked-by: NMike Turquette <mturquette@linaro.org>
      f58b082a