This just leaves cpu.c, devices.c and mm.c to clean up.  As these files
are used on more than one SOC they need some more work.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Alberto Panizzo <maramaopercheseimorto@gmail.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Guennadi Liakhovetski <lg@denx.de>
Cc: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Harro Haan <hrhaan@yahoo.com>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Luotao Fu <l.fu@pengutronix.de>
Cc: Ilya Yanok <yanok@emcraft.com>

otg_ulpi_create is defined in drivers/usb/otg/ulpi.c which depends on
CONFIG_USB_ULPI.  So protect its usage by the same symbol.  Moreover
mxc_ulpi_access_ops needs CONFIG_MXC_ULPI.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Commit 52939c03 (ARM: MX3: fix CPU revision number detection) started
using the CPU's SREV register for revision number detection. This
makes it mandatory to have a valid SPBA0 mapping. Add this to the
global map_io code instead of adding multiple copies for each board.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>

Tested on Qong (EVB-Lite)
Tested-by: NWolfgang Denk <wd@denx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently, linux-next breaks due to a typo introduced in commit
33c4d919

This patch fixes it.
Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NHarro Haan <hrhaan@yahoo.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NHarro Haan <hrhaan@yahoo.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Before the clock was left enabled only for DEBUG_LL_CONSOLE which
requires an additional patch to exist at all.  With this patch applied
DEBUG_LL_CONSOLE depends on DEBUG_LL, so this doesn't break.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Adds requirement for ADC on mc13783 and moves the spidev declaration
to marxbot file.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The macro mx31_revision() used to take the global variable system_rev to
determine the CPU revision number. However, this number is expected to
be set by the bootloader and is usually zero (at least on my MX31 based
boards here). More than that, it is usually taken to identify the
board's revision, not the CPU's.

Fix that by reading the the CPU's SREV register instead.

Right now, mx31_read_cpu_rev() is called from mx31_clocks_init() which
is admittedly not a good place for it. However, we need to enable the
IIM clock first, and the clock code also has conditional code that
depends on mx31_revision() returning the right thing.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Register the MC13783 device in the module code.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The names are chosen to match the silkscreen.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Some header files were reordered while I was at it.
The only device currently registered is the ATLAS PMIC (MC13783) chip.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This commit splits the support code for LogicPD's mx31lite hardware
into module and board specific parts.

This introduces a new mandatory coreparam called 'mx31lite_baseboard'
which specifies the base board support to use. For now, only the LiteKit
development board is supported, and developers of own boards are
encouraged to use that as reference.

The UART support moved to the board code.
Some comments were amended along the way.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The address area of the NFC in the i.MX35 silicon is much larger than 4k.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

We have two mt9t031 cameras that have a muxed bus on the robot.
Only one is currently initialized because of limitations in
soc_camera that should be removed later.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

We get rid of CTS/RTS lines on uart0 on our platform.
This is the port we use as main kernel console. We do not
want it to be blocking because of CTS/RTS signals, not allowing
the system to boot or print messages.

However we often use it with a bluetooth module needing CTS/RTS
lines as backup login in case of trouble. To be able to use it,
we assert CTS low so that the module can always send chars.
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The RTC chip Seiko Instruments S-35390A is connected to the Application
Processor over the second bus i2c with the hard coded address 0x30.
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This add pin allocation an device registration for the
second bus i2c.
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Armadillo500 Correct bus length for SMSC9118 on board chip.

The SMSC9118 network chip is connected to the data bus with a 16 bit
interface, not 32 as early suggested.
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

There are two low active Buttons on boards.
This patch connect those to the Input Subsystem over gpio-keys driver.
Signed-off-by: NAlberto Panizzo <maramaopercheseimorto@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The chip is actually located on the module, not on the base board. But
other base boards might add more SPI devices, so the spi_board_info
struct must be separated from the module code.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This adds support for the two SPI busses found on the lilly1131 module.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The module does not use these pins for I2C but for SPI.
Signed-off-by: NDaniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>