1. 08 5月, 2012 1 次提交
  2. 02 5月, 2012 2 次提交
    • L
      ARM: ux500: delete U5500 support · 29746f48
      Linus Walleij 提交于
      This platform has been obsoleted and was only available inside of
      ST-Ericsson, no users of this code are left in the world. This
      deletes the core U5500 support entirely in the same manner as the
      obsoleted U8500 silicon was previously deleted.
      
      The cpu_is_u5500() macros that can read out the CPU ID is left
      until the next kernel cycle, this makes it possible to merge
      deletion of dependent drivers without breakage.
      
      This also has the upside of removing the mailbox driver which was
      our only driver that was outside the drivers/* hiearchy, now the
      machine directory only handles machines and nothing else.
      
      Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
      Cc: Rabin Vincent <rabin.vincent@stericsson.com>
      Cc: Jonas Aberg <jonas.aberg@stericsson.com>
      Cc: Per Forlin <per.forlin@stericsson.com>
      Cc: Ulf Hansson <ulf.hansson@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      29746f48
    • L
      ARM: ux500: core U9540 support · bc71c096
      Linus Walleij 提交于
      This adds support for the U9540 variant of the U8500 series. This
      is an application processor without internal modem. This is the
      most basic part with ASIC ID, CPU-related fixes, IRQ list, register
      ranges, timer, UART, and L2 cache setup. This is based on a patch
      by Michel Jaouen which was rewritten to fit with the latest 3.3
      kernel.
      
      ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
        migrate to using Device Tree for getting the IRQs to devices.
      ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
        as suggested by Arnd Bergmann.
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NSebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
      Signed-off-by: NMichel Jaouen <michel.jaouen@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      bc71c096
  3. 24 4月, 2012 1 次提交
  4. 17 3月, 2012 1 次提交
  5. 13 3月, 2012 1 次提交
  6. 13 2月, 2012 1 次提交
  7. 24 10月, 2011 1 次提交
  8. 22 9月, 2011 3 次提交
  9. 30 8月, 2011 2 次提交
  10. 25 5月, 2011 3 次提交
  11. 11 1月, 2011 2 次提交
  12. 15 12月, 2010 1 次提交
  13. 08 12月, 2010 3 次提交
  14. 22 11月, 2010 1 次提交
  15. 26 10月, 2010 1 次提交
    • P
      ARM: ux500 specific L2 cache code · ae694804
      Per Fransson 提交于
      The generic version of l2x0_inv_all is only called just after disabling
      the L2 cache and is surrounded by a spinlock. However, we're not really
      turning off the L2 cache right now, and the PL310 does not support
      exclusive accesses (used to implement the spinlock). So, the
      invalidation needs to be done without the spinlock.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Hans-Juergen Koch <hjk@linutronix.de>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NPer Fransson <per.xx.fransson@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
      ae694804
  16. 27 5月, 2010 1 次提交
  17. 05 5月, 2010 3 次提交