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  1. 27 10月, 2015 2 次提交
  3. 26 10月, 2015 1 次提交
  5. 23 10月, 2015 2 次提交
  7. 20 10月, 2015 9 次提交
  9. 17 10月, 2015 4 次提交
    • M
      pinctrl: baytrail: Fix compilation warnings when !CONFIG_PM · ec879f12
      由 Mika Westerberg 提交于 
      When CONFIG_PM is not set we get following compilation warnings:

 warning: ‘byt_gpio_runtime_suspend’ defined but not used [-Wunused-function]
 warning: ‘byt_gpio_runtime_resume’ defined but not used [-Wunused-function]

Fix this by guarding byt_gpio_runtime_suspend()/byt_gpio_runtime_resume()
with #ifdef CONFIG_PM.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ec879f12
    • M
      pinctrl: intel: Fix compilation warning when !CONFIG_PM_SLEEP · f487bbf3
      由 Mika Westerberg 提交于 
      We get following warning when CONFIG_PM_SLEEP is not set

  warning: ‘intel_gpio_irq_init’ defined but not used [-Wunused-function]

Since the function is only called from intel_pinctrl_resume() move it
inside CONFIG_PM_SLEEP guard as well.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      f487bbf3
    • J
      pinctrl: qcom: ssbi: fix compilation with DEBUG_FS=n · 11091fb0
      由 Jonas Gorski 提交于 
      The DEBUG_FS=n #defines for the dbg_show functions were missed when
renaming the driver from msm_ to pm8xxx_, causing it to break the build
when DEBUG_FS isn't enabled:

  CC [M]  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.o
drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c:597:14: error: ‘pm8xxx_gpio_dbg_show’ undeclared here (not in a function)
  .dbg_show = pm8xxx_gpio_dbg_show,

Fix this by renaming them correctly.

Fixes: b4c45fe9 ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers")
Signed-off-by: NJonas Gorski <jogo@openwrt.org>
Reviewed-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      11091fb0
    • W
      pinctrl: atlas7: support atlas7 step B changes · 3fa508cd
      由 Wei Chen 提交于 
      The the pin groups and pin functions have been changed
in atlas7 step B soc. We have to update the driver
to support step B chip.

Changes:
1. add 5 jtag pins to IOC_TOP:
	"jtag_tdo", "jtag_tms","jtag_tck", "jtag_tdi", "jtag_trstn"
	these 5 pins can be mutiplex with other functions, so we
	have to conver these 5 pins in pinmux.
2. add pin groups for audio digmic, audio spdif, can transceiver
	en, can transceiver stb, i2s0, i2s1 and jtag.
3. serval pins can be located to more PADs:
	audio_uart0_urfs, audio_uart1_urfs, audio_uart2_urfs,
	audio_uart2_urxd, audio_uart2_usclk, audio_uart2_utfs,
	audio_uart2_utxd, can0_rxd, can0_txd, can1_rxd, can1_txd
	jtag_ntrst, jtag_swdiotms, jtag_tck, jtag_tdi, jtag_tdo,
	pw_cko0, pw_cko1, pw_i2s01, pw_pwm0, pw_pwm1, sd2_cdb,
	sd2_wpb, uart2_cts, uart2_rts, uart2_rxd, uart2_txd,
	uart3_cts, uart3_rts, uart3_rxd, uart3_txd, uart4_cts,
	uart4_rts, usb0_drvvbus, usb1_drvvbus.

Because of Changes#3, some functions should have more than one
pin groups. So we have to split the original pin group to serval
pin groups.

For example:
audio_uart0 has 5 pins, on STEPA, each of these 5 pins only has
one related PAD. But on STEPB, audio_uart0_urfs has 4 related
PAD.
So we place the 4 pins with one PAD into a single pin group:
	audio_uart0_basic_group.
and place urfs pin wtih different PADs to 4 different pin groups:
	audio_uart0_urfs_group0, ..., audio_uart0_urfs_group3

A full audio_uart0 pin group can be:
	pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group0>;
If audio_uart0 pin group encountered some confiction, we only have
to change the urfs group:
	pinctrl-0 = <&audio_uart0_basic_group &audio_uart0_urfs_group2>;
Signed-off-by: NWei Chen <Wei.Chen@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3fa508cd
  11. 16 10月, 2015 8 次提交
  13. 03 10月, 2015 8 次提交
  15. 02 10月, 2015 6 次提交