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  1. 07 5月, 2014 2 次提交
  3. 30 4月, 2014 1 次提交
  5. 29 4月, 2014 1 次提交
  7. 25 4月, 2014 3 次提交
    • E
      drm/i915: Break encoder->crtc link separately in intel_sanitize_crtc() · 7f1950fb
      由 Egbert Eich 提交于 
      Depending on the SDVO output_flags SDVO may have multiple connectors
linking to the same encoder (in intel_connector->encoder->base).
Only one of those connectors should be active (ie link to the encoder
thru drm_connector->encoder).
If intel_connector_break_all_links() is called from intel_sanitize_crtc()
we may break the crtc connection of an encoder thru an inactive connector
in which case intel_connector_break_all_links() will not be called again
for the active connector if this happens to come later in the list due to:
    if (connector->encoder->base.crtc != &crtc->base)
                                 continue;
in intel_sanitize_crtc().
This will however leave the drm_connector->encoder linkage for this
active connector in place. Subsequently this will cause multiple
warnings in intel_connector_check_state() to trigger and the driver
will eventually die in drm_encoder_crtc_ok() (because of crtc == NULL).

To avoid this remove intel_connector_break_all_links() and move its
code to its two calling functions: intel_sanitize_crtc() and
intel_sanitize_encoder().
This allows to implement the link breaking more flexibly matching
the surrounding code: ie. in intel_sanitize_crtc() we can break the
crtc link separatly after the links to the encoders have been
broken which avoids above problem.

This regression has been introduced in:

commit 24929352
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Jul 2 20:28:59 2012 +0200

    drm/i915: read out the modeset hw state at load and resume time

so goes back to the very beginning of the modeset rework.

v2: This patch takes care of the concernes voiced by Chris Wilson
and Daniel Vetter that only breaking links if the drm_connector
is linked to an encoder may miss some links.
v3: move all encoder handling to encoder loop as suggested by
Daniel Vetter.
Signed-off-by: NEgbert Eich <eich@suse.de>
Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      7f1950fb
    • C
      drm/i915: Move all ring resets before setting the HWS page · 78f2975e
      由 Chris Wilson 提交于 
      In commit a51435a3
Author: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com>
Date:   Wed Mar 12 16:39:40 2014 +0530

    drm/i915: disable rings before HW status page setup

we reordered stopping the rings to do so before we set the HWS register.
However, there is an extra workaround for g45 to reset the rings twice,
and for consistency we should apply that workaround before setting the
HWS to be sure that the rings are truly stopped.

Reference: http://lkml.kernel.org/r/20140423202248.GA3621@amd.pavel.ucw.czTested-by: NPavel Machek <pavel@ucw.cz>
Cc: Naresh Kumar Kachhi <naresh.kumar.kachhi@intel.com>
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      78f2975e
    • D
      drm/i915: Don't WARN nor handle unexpected hpd interrupts on gmch platforms · 3ff04a16
      由 Daniel Vetter 提交于 
      The status bits are unconditionally set, the control bits only enable
the actual interrupt generation. Which means if we get some random
other interrupts we'll bogusly complain about them.

So restrict the WARN to platforms with a sane hotplug interrupt
handling scheme. And even more important also don't attempt to process
the hpd bit since we've detected a storm already. Instead just clear
the bit silently.

This WARN has been introduced in

commit b8f102e8
Author: Egbert Eich <eich@suse.de>
Date:   Fri Jul 26 14:14:24 2013 +0200

    drm/i915: Add messages useful for HPD storm detection debugging (v2)

before that we silently handled the hpd event and so partially
defeated the storm detection.

v2: Pimp commit message (Jani)

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Egbert Eich <eich@suse.de>
Cc: bitlord <bitlord0xff@gmail.com>
Reported-by: Nbitlord <bitlord0xff@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      3ff04a16
  9. 24 4月, 2014 2 次提交
  11. 23 4月, 2014 2 次提交
    • P
      drm/i915: get power domain in case the BIOS enabled eDP VDD · 63635217
      由 Paulo Zanoni 提交于 
      If I unplug the eDP monitor, the BIOS of my machine will enable the
VDD bit, then when the driver loads it will think VDD is enabled. It
will detect that the eDP is not enabled and return false from
intel_edp_init_connector. This will trigger a call to
edp_panel_vdd_off_sync(), which trigger a WARN saying that the
refcount of the power domain is less than zero.

The problem happens because the driver gets a refcount whenever it
enables the VDD bit, and puts the refcount whenever it disables the
VDD bit. But on this case, the BIOS enabled VDD, so all we do is to
call put() without calling get() first, so the code added is there to
make sure we always have the get() in case the BIOS enabled the bit.

This regression was introduced in
commit e9cb81a2
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Thu Nov 21 13:47:23 2013 -0200

    drm/i915: get a runtime PM reference when the panel VDD is on

v2: - Rebase

Tested-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org (v3.13+)
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      63635217
    • D
      drm/i915: Don't check gmch state on inherited configs · 9953599b
      由 Daniel Vetter 提交于 
      ... our current modeset code isn't good enough yet to handle this. The
scenario is:

1. BIOS sets up a cloned config with lvds+external screen on the same
pipe, e.g. pipe B.

2. We read out that state for pipe B and assign the gmch_pfit state to
it.

3. The initial modeset switches the lvds to pipe A but due to lack of
atomic modeset we don't recompute the config of pipe B.

-> both pipes now claim (in the sw pipe config structure) to use the
gmch_pfit, which just won't work.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74081Tested-by: Nmax <manikulin@gmail.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: stable@vger.kernel.org
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      9953599b
  13. 22 4月, 2014 1 次提交
    • V
      drm/i915: Allow user modes to exceed DVI 165MHz limit · 40478455
      由 Ville Syrjälä 提交于 
      In commit
 commit 6375b768
 Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
 Date:   Mon Mar 3 11:33:36 2014 +0200

    drm/i915: Reject >165MHz modes w/ DVI monitors

the driver started to filter out display modes which exceed the
single-link DVI 165Mz dotclock limits when the monitor doesn't report
itself as being HDMI compliant. The intent was to filter out all
EDID derived modes that require dual-link DVI to operate since we
don't support dual-link.

However the patch went a bit too far and also causes the driver to reject
such modes even when specified by the user. Normally we don't check the
sink limitations when setting a mode from the user. This allows the user
to specify any mode whether the sink reports to support it or not. This
can be useful since often the sinks support more modes than they report
in the EDID.

So relax the checks a bit, and apply the single-link DVI dotclock limit
only when filtering the mode list, and ignore the limit when setting
a user specified mode.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=72961Tested-by: NNicholas Vinson <nvinson@comcast.net>
Cc: stable@vger.kernel.org [3.14]
Reviewed-by: NDaniel Vetter <daniel@ffwll.ch>
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      40478455
  15. 11 4月, 2014 3 次提交
  17. 10 4月, 2014 1 次提交
  19. 08 4月, 2014 1 次提交
  21. 04 4月, 2014 5 次提交
  23. 02 4月, 2014 11 次提交
    • C
      drm/i915: Fix the computation of required fb size for pipe · bc104d1f
      由 Chris Wilson 提交于 
      The computation of required framebuffer size in

commit d978ef14
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Fri Mar 7 08:57:51 2014 -0800

    drm/i915: Wrap the preallocated BIOS framebuffer and preserve for KMS fbcon v12

is too optimistic, and would rely on the invariant fb being
reconstructed to exactly fit each pipe (and probably ignore hardware
limits). Instead, we want to compute the upper bound on what the display
engine will access and ensure that is within the inherited framebuffer.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      bc104d1f
    • M
      drm: Replace crtc fb with primary plane fb (v3) · f4510a27
      由 Matt Roper 提交于 
      Now that CRTC's have a primary plane, there's no need to track the
framebuffer in the CRTC.  Replace all references to the CRTC fb with the
primary plane's fb.

This patch was generated by the Coccinelle semantic patching tool using
the following rules:

        @@ struct drm_crtc C; @@
        -   (C).fb
        +   C.primary->fb

        @@ struct drm_crtc *C; @@
        -   (C)->fb
        +   C->primary->fb

v3: Generate patch via coccinelle.  Actual removal of crtc->fb has been
    moved to a subsequent patch.

v2: Fixup several lingering crtc->fb instances that were missed in the
    first patch iteration.  [Rob Clark]
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NRob Clark <robdclark@gmail.com>
      f4510a27
    • M
      drm/i915: Restrict plane loops to only operate on overlay planes (v2) · af2b653b
      由 Matt Roper 提交于 
      Ensure that existing driver loops over all planes do not change behavior
when we begin adding new types of planes (primary and cursor) to the DRM
plane list in future patches.

v2: Switch to using drm_for_each_legacy_plane()

Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      af2b653b
    • P
      drm/i915: don't get/put runtime PM at the debugfs forcewake file · c8431fda
      由 Paulo Zanoni 提交于 
      Because gen6_gt_force_wake_{get,put} should already be responsible for
getting/putting runtime PM. If we keep these calls, debugfs will not
be testing the get/put calls of the forcewake functions.
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c8431fda
    • P
      drm/i915: fix WARNs when reading DDI state while suspended · 882244a3
      由 Paulo Zanoni 提交于 
      If runtime PM is enabled and we unset all modes, we will runtime
suspend after __intel_set_mode() , then function
intel_modeset_check_state() will try to read the HW state while it is
suspended and trigger lots of WARNs because it shouldn't be reading
registers.

So on this patch we make intel_ddi_connector_get_hw_state() return
false in case the power domain is disabled, and we also make
intel_display_power_enabled() return false in case the device is
suspended. Notice that we can't just use
intel_display_power_enabled_sw() because while the driver is being
initialized the power domain refcounts are not reflecting the real
state of the hardware.

Just for reference, I have previously published an alternate patch for
this problem, called "drm/i915: get runtime PM at intel_set_mode".

Testcase: igt/pm_pc8
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      882244a3
    • P
      drm/i915: don't read cursor registers on powered down pipes · a23dc658
      由 Paulo Zanoni 提交于 
      At i915_display_info, don't call cursor_position() for a disabled
CRTC, since the CRTC may be on a powered down pipe, and this will
cause "Unclaimed register before interrupt" error messages.

Testcase: igt/pm_pc8/debugfs-read
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a23dc658
    • P
      drm/i915: get runtime PM at i915_display_info · b0e5ddf3
      由 Paulo Zanoni 提交于 
      Otherwise we may get some WARNs complaining that we're reading a
register while we're suspended.

Testcase: igt/pm_pc8/debugfs-read
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b0e5ddf3
    • P
      drm/i915: don't read pp_ctrl_reg if we're suspended · efbc20ab
      由 Paulo Zanoni 提交于 
      ... at edp_have_panel_vdd. Just return false, saying we don't have the
panel VDD since the device is suspended.

We started getting WARNs about this problem since the patch that
started checking if we're suspended while reading registers.

Example backtrace provided by Paulo:

[   63.572201] [drm:hsw_enable_pc8] Enabling package C8+
[   63.581831] [drm:i915_runtime_suspend] Device suspended
[   63.664798] ------------[ cut here ]------------
[   63.664824] WARNING: CPU: 3 PID: 828 at
drivers/gpu/drm/i915/intel_uncore.c:47
assert_device_not_suspended.isra.7+0x32/0x40 [i915]()
[   63.664826] Device suspended
[   63.664828] Modules linked in: ccm fuse ip6table_filter ip6_tables
ebtable_nat ebtables arc4 ath9k_htc ath9k_common ath9k_hw mac80211 ath
cfg80211 iTCO_wdt iTCO_vendor_support x86_pkg_temp_thermal coretemp
microcode i2c_i801 e1000e pcspkr serio_raw lpc_ich ptp pps_core mei_me
mei mfd_core dm_crypt i915 crc32_pclmul crc32c_intel
ghash_clmulni_intel i2c_algo_bit drm_kms_helper drm video
[   63.664867] CPU: 3 PID: 828 Comm: kworker/3:3 Not tainted 3.14.0+ #153
[   63.664869] Hardware name: Intel Corporation Shark Bay Client
platform/WhiteTip Mountain 1, BIOS HSWLPTU1.86C.0133.R00.1309172123
09/17/2013
[   63.664887] Workqueue: events edp_panel_vdd_work [i915]
[   63.664889]  0000000000000009 ffff88009d745c28 ffffffff8167ec6f
ffff88009d745c70
[   63.664895]  ffff88009d745c60 ffffffff8106c8ed ffff880036278000
00000000000c7204
[   63.664900]  ffff88014f2d3040 ffff880036278070 0000000000000001
ffff88009d745cc0
[   63.664905] Call Trace:
[   63.664911]  [<ffffffff8167ec6f>] dump_stack+0x4d/0x66
[   63.664916]  [<ffffffff8106c8ed>] warn_slowpath_common+0x7d/0xa0
[   63.664920]  [<ffffffff8106c95c>] warn_slowpath_fmt+0x4c/0x50
[   63.664926]  [<ffffffff810bd6be>] ? mark_held_locks+0xae/0x130
[   63.664941]  [<ffffffffa00d80d2>]
assert_device_not_suspended.isra.7+0x32/0x40 [i915]
[   63.664956]  [<ffffffffa00d99d2>] gen6_read32+0x32/0x120 [i915]
[   63.664969]  [<ffffffffa00d99a0>] ? gen6_read8+0x120/0x120 [i915]
[   63.664985]  [<ffffffffa0106f8f>] edp_have_panel_vdd+0x3f/0x50 [i915]
[   63.665000]  [<ffffffffa01074e8>] edp_panel_vdd_off_sync+0x58/0x1c0 [i915]
[   63.665004]  [<ffffffff8108a06c>] ? process_one_work+0x18c/0x560
[   63.665018]  [<ffffffffa0107684>] edp_panel_vdd_work+0x34/0x50 [i915]
[   63.665022]  [<ffffffff8108a0d7>] process_one_work+0x1f7/0x560
[   63.665026]  [<ffffffff8108a06c>] ? process_one_work+0x18c/0x560
[   63.665031]  [<ffffffff8108ae2b>] worker_thread+0x11b/0x3a0
[   63.665035]  [<ffffffff8108ad10>] ? manage_workers.isra.21+0x2a0/0x2a0
[   63.665039]  [<ffffffff810916fc>] kthread+0xfc/0x120
[   63.665043]  [<ffffffff81091600>] ? kthread_create_on_node+0x230/0x230
[   63.665048]  [<ffffffff8169082c>] ret_from_fork+0x7c/0xb0
[   63.665052]  [<ffffffff81091600>] ? kthread_create_on_node+0x230/0x230
[   63.665054] ---[ end trace 1250bcc890af9999 ]---
[   63.665060] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
[   63.665061] ------------[ cut here ]------------

Testcase: igt/pm_pc8
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      efbc20ab
    • P
      drm/i915: get runtime PM at i915_reg_read_ioctl · cf67c70f
      由 Paulo Zanoni 提交于 
      To avoid WARNs when we call it.

Testcase: igt/pm_pc8/reg-read-ioctl
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75693Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      cf67c70f
    • P
      drm/i915: don't schedule force_wake_timer at gen6_read · aa0b3b5b
      由 Paulo Zanoni 提交于 
      So far force_wake_timer was only used by gen6_gt_force_wake_put. Since
we always had balanced gen6_gt_force_wake_get/put calls, we could
guarantee balanced calls to intel_runtime_pm_get/put.

Commit 8232644c, "drm/i915: Convert
the forcewake worker into a timer func" started scheduling the
force_wake_timer at gen6_read, which resulted in an unbalanced
runtime_pm refcount.

So this commit just reverts to the old behavior until we can find a
proper way to used delayed force_wake from the register read/write
macros without leaving the runtime_pm refcounts unbalanced and without
runtime suspending the driver while forcewake is active.

Testcase: igt/pm_pc8/rte
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76544Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      aa0b3b5b
    • I
      drm/i915: vlv: reserve the GT power context only once during driver init · ae48434c
      由 Imre Deak 提交于 
      Atm we reserve/allocate and free the power context during GT power
enable/disable time. There is no need to do this, we can reserve/allocate
the buffer once during driver loading and free it during driver cleanup.
The re-reservation can also fail in case the driver previously manages to
allocate something on the given fixed address.

The buffer isn't exepected to move even if allocated by the BIOS, for
safety add an assert to check this assumption.

This also fixed a bug for Ville, where re-reserving the context failed
during a GPU reset (I assume because something else got allocated on its
fixed address).
Tested-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NImre Deak <imre.deak@intel.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ae48434c
  25. 31 3月, 2014 7 次提交