Adds README file, TODO list, and a couple of other pieces that didn't seem
to fit into any other patch.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Minimal functionality...
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

The OpenRISC Linux kernel conforms to the "generic" syscall interface which
contains only the reduced set of syscalls deemed necessary for new
architectures.  Unfortunately, the uClibc port for OpenRISC does not fully
support this reduced set; as such, an additional patch available out-of-tree
needs to be applied to the kernel in order to use the current uClibc.  This
is just a temporary measure until the libc port can be straightened out; it
is likely that OpenRISC will make the transition to glibc shortly where the
generic syscall interface is better supported.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

This patch adds support for the OpenRISC PIC.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Implements support for the OpenRISC timer which is a 28 bit cycle counter
that can be read out of a special purpose register.  This counter is
used as a both a clock event and clocksource device.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: tglx@linutronix.de
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Simple DMA implementation.  Allows for allocation of coherent memory
(simply uncached) for DMA operations.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

This patch implements minimal PTrace support.  The pt_regs structure is
not exported to userspace for OpenRISC; rather, the GETREGSET mechanism
is intended to be used and the registers, as such, exported in the core
dump format which is ABI stable.  This is in line with what is intended
for new architectures as of 2.6.34 and has the advantage of permitting
the layout of the registers on the kernel stack (as per pt_regs) to be
freely modified.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

The OpenRISC architecture uses the device tree infrastructure for the
platform description.  This is currently limited to having a device tree
built into the kernel, but work is underway within the OpenRISC project
to define how this device tree blob should be passed into the kernel from
an external resource.

Patch contains a single example DTS file to go with the defconfig for
or1ksim.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Cc: devicetree-discuss@lists.ozlabs.org
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

Architecture code and early setup routines for booting Linux.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>