1. 12 10月, 2016 2 次提交
  2. 11 10月, 2016 1 次提交
  3. 05 10月, 2016 1 次提交
  4. 15 9月, 2016 2 次提交
  5. 13 9月, 2016 1 次提交
  6. 07 9月, 2016 1 次提交
    • L
      PCI: rcar: Fix pci_remap_iospace() failure path · 5e8c8732
      Lorenzo Pieralisi 提交于
      On ARM/ARM64 architectures, PCI IO ports are emulated through memory mapped
      IO, by reserving a chunk of virtual address space starting at PCI_IOBASE
      and by mapping the PCI host bridges memory address space driving PCI IO
      cycles to it.
      
      PCI host bridge drivers that enable downstream PCI IO cycles map the host
      bridge memory address responding to PCI IO cycles to the fixed virtual
      address space through the pci_remap_iospace() API.
      
      This means that if the pci_remap_iospace() function fails, the
      corresponding host bridge PCI IO resource must be considered invalid, in
      that there is no way for the kernel to actually drive PCI IO transactions
      if the memory addresses responding to PCI IO cycles cannot be mapped into
      the CPU virtual address space.
      
      The PCI rcar host bridge driver does not remove the PCI IO resource from
      the host bridge resource windows if the pci_remap_iospace() call fails;
      this is an actual bug in that the PCI host bridge would consider the PCI IO
      resource valid (and possibly assign it to downstream devices) even if the
      kernel was not able to map the PCI host bridge memory address driving IO
      cycle to the CPU virtual address space (ie pci_remap_iospace() failures).
      
      Fix the PCI host bridge driver pci_remap_iospace() failure path, by
      destroying the PCI host bridge PCI IO resources retrieved through firmware
      when the pci_remap_iospace() function call fails, therefore preventing the
      kernel from adding the respective PCI IO resource to the list of PCI host
      bridge valid resources, fixing the issue.
      
      Fixes: 5d2917d4 ("PCI: rcar: Convert to DT resource parsing API")
      Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: Phil Edworthy <phil.edworthy@renesas.com>
      CC: Simon Horman <horms+renesas@verge.net.au>
      5e8c8732
  7. 23 8月, 2016 1 次提交
  8. 02 8月, 2016 1 次提交
  9. 25 6月, 2016 2 次提交
  10. 06 2月, 2016 1 次提交
  11. 11 1月, 2016 2 次提交
  12. 09 1月, 2016 1 次提交
  13. 07 1月, 2016 1 次提交
    • G
      PCI: host: Mark PCIe/PCI (MSI) IRQ cascade handlers as IRQF_NO_THREAD · 8ff0ef99
      Grygorii Strashko 提交于
      On -RT and if kernel is booting with "threadirqs" cmd line parameter,
      PCIe/PCI (MSI) IRQ cascade handlers (like dra7xx_pcie_msi_irq_handler())
      will be forced threaded and, as result, will generate warnings like this:
      
        WARNING: CPU: 1 PID: 82 at kernel/irq/handle.c:150 handle_irq_event_percpu+0x14c/0x174()
        irq 460 handler irq_default_primary_handler+0x0/0x14 enabled interrupts
        Backtrace:
         (warn_slowpath_common) from (warn_slowpath_fmt+0x38/0x40)
         (warn_slowpath_fmt) from (handle_irq_event_percpu+0x14c/0x174)
         (handle_irq_event_percpu) from (handle_irq_event+0x84/0xb8)
         (handle_irq_event) from (handle_simple_irq+0x90/0x118)
         (handle_simple_irq) from (generic_handle_irq+0x30/0x44)
         (generic_handle_irq) from (dra7xx_pcie_msi_irq_handler+0x7c/0x8c)
         (dra7xx_pcie_msi_irq_handler) from (irq_forced_thread_fn+0x28/0x5c)
         (irq_forced_thread_fn) from (irq_thread+0x128/0x204)
      
      This happens because all of them invoke generic_handle_irq() from the
      requested handler.  generic_handle_irq() grabs raw_locks and thus needs to
      run in raw-IRQ context.
      
      This issue was originally reproduced on TI dra7-evem, but, as was
      identified during discussion [1], other hosts can also suffer from this
      issue.  Fix all them at once by marking PCIe/PCI (MSI) IRQ cascade handlers
      IRQF_NO_THREAD explicitly.
      
      [1] http://lkml.kernel.org/r/1448027966-21610-1-git-send-email-grygorii.strashko@ti.com
      
      [bhelgaas: add stable tag, fix typos]
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: Lucas Stach <l.stach@pengutronix.de> (for imx6)
      CC: stable@vger.kernel.org
      CC: Kishon Vijay Abraham I <kishon@ti.com>
      CC: Jingoo Han <jingoohan1@gmail.com>
      CC: Kukjin Kim <kgene@kernel.org>
      CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
      CC: Richard Zhu <Richard.Zhu@freescale.com>
      CC: Thierry Reding <thierry.reding@gmail.com>
      CC: Stephen Warren <swarren@wwwdotorg.org>
      CC: Alexandre Courbot <gnurou@gmail.com>
      CC: Simon Horman <horms@verge.net.au>
      CC: Pratyush Anand <pratyush.anand@gmail.com>
      CC: Michal Simek <michal.simek@xilinx.com>
      CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
      CC: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
      8ff0ef99
  14. 10 12月, 2015 1 次提交
  15. 09 12月, 2015 2 次提交
  16. 30 10月, 2015 4 次提交
  17. 12 8月, 2015 1 次提交
    • R
      PCI: Kill off set_irq_flags() usage · 3e146753
      Rob Herring 提交于
      set_irq_flags is ARM-specific with custom flags which have genirq
      equivalents.  Convert drivers to use the genirq interfaces directly, so we
      can kill off set_irq_flags.  The translation of flags is as follows:
      
        IRQF_VALID -> !IRQ_NOREQUEST
        IRQF_PROBE -> !IRQ_NOPROBE
        IRQF_NOAUTOEN -> IRQ_NOAUTOEN
      
      For IRQs managed by an irqdomain, the irqdomain core code handles clearing
      and setting IRQ_NOREQUEST already, so there is no need to do this in .map()
      functions, and we can simply remove the set_irq_flags calls.  Some users
      also modify IRQ_NOPROBE, and this has been maintained although it is not
      clear that is really needed.  There appears to be a great deal of blind
      copy and paste of this code.
      Signed-off-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NJingoo Han <jingoohan1@gmail.com>
      CC: Kishon Vijay Abraham I <kishon@ti.com>
      CC: Murali Karicheri <m-karicheri2@ti.com>
      CC: Thierry Reding <thierry.reding@gmail.com>
      CC: Stephen Warren <swarren@wwwdotorg.org>
      CC: Alexandre Courbot <gnurou@gmail.com>
      CC: Jingoo Han <jingoohan1@gmail.com>
      CC: Pratyush Anand <pratyush.anand@gmail.com>
      CC: Simon Horman <horms@verge.net.au>
      CC: Michal Simek <michal.simek@xilinx.com>
      CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
      3e146753
  18. 24 2月, 2015 3 次提交
  19. 28 12月, 2014 1 次提交
  20. 27 12月, 2014 1 次提交
  21. 23 11月, 2014 2 次提交
    • T
      PCI/MSI: Rename mask/unmask_msi_irq treewide · 280510f1
      Thomas Gleixner 提交于
      The PCI/MSI irq chip callbacks mask/unmask_msi_irq have been renamed
      to pci_msi_mask/unmask_irq to mark them PCI specific. Rename all usage
      sites. The conversion helper functions are kept around to avoid
      conflicts in next and will be removed after merging into mainline.
      
      Coccinelle assisted conversion. No functional change.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Chris Metcalf <cmetcalf@tilera.com>
      Cc: x86@kernel.org
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Murali Karicheri <m-karicheri2@ti.com>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Mohit Kumar <mohit.kumar@st.com>
      Cc: Simon Horman <horms@verge.net.au>
      Cc: Michal Simek <michal.simek@xilinx.com>
      Cc: Yijing Wang <wangyijing@huawei.com>
      280510f1
    • J
      PCI/MSI: Rename write_msi_msg() to pci_write_msi_msg() · 83a18912
      Jiang Liu 提交于
      Rename write_msi_msg() to pci_write_msi_msg() to mark it as PCI
      specific.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Marc Zyngier <marc.zyngier@arm.com>
      Cc: Yingjoe Chen <yingjoe.chen@mediatek.com>
      Cc: Yijing Wang <wangyijing@huawei.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      83a18912
  22. 22 11月, 2014 1 次提交
  23. 12 11月, 2014 1 次提交
  24. 24 10月, 2014 1 次提交
  25. 20 10月, 2014 1 次提交
  26. 01 10月, 2014 1 次提交
    • L
      of/pci: Fix the conversion of IO ranges into IO resources · 0b0b0893
      Liviu Dudau 提交于
      The ranges property for a host bridge controller in DT describes the
      mapping between the PCI bus address and the CPU physical address.  The
      resources framework however expects that the IO resources start at a pseudo
      "port" address 0 (zero) and have a maximum size of IO_SPACE_LIMIT.  The
      conversion from PCI ranges to resources failed to take that into account,
      returning a CPU physical address instead of a port number.
      
      Also fix all the drivers that depend on the old behaviour by fetching the
      CPU physical address based on the port number where it is being needed.
      Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      CC: Grant Likely <grant.likely@linaro.org>
      CC: Rob Herring <robh+dt@kernel.org>
      CC: Arnd Bergmann <arnd@arndb.de>
      CC: Thierry Reding <thierry.reding@gmail.com>
      CC: Simon Horman <horms@verge.net.au>
      CC: Catalin Marinas <catalin.marinas@arm.com>
      0b0b0893
  27. 16 7月, 2014 1 次提交
  28. 06 7月, 2014 2 次提交