- 05 5月, 2010 2 次提交
-
-
由 Rabin Vincent 提交于
Split up all the hardware register definitions previously found in hardware.h into per-SoC files db8500-regs.h and db5500-regs.h. Rename a couple of macros to prepare for sharing code between the variants. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Rabin Vincent 提交于
This adds the different config options for SoCs DB8500 and DB5500 and refines the SoC/CPU detection code to support the DB5500 as well via these. The selection between DB5500 and DB8500 is currently a simple compile-time choice. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 20 3月, 2010 2 次提交
-
-
由 Rabin Vincent 提交于
Add support for the GPIOs on the U8500, using the plat-nomadik GPIO driver. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Rabin Vincent 提交于
Add cpu_is_u8500{ed/v1}() functions to determine the variant based on the CPU id, add the changed peripheral addresses, and fixup the MTU address. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 07 3月, 2010 1 次提交
-
-
由 Rabin Vincent 提交于
Correct the base addresses of the CLKRST registers. Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 28 11月, 2009 1 次提交
-
-
由 Srinidhi Kasagar 提交于
Adds register definitions, shared peripheral interrupt numbers (SHPI) and IO mappings for the U8500 core support. SHPI are assigned to [160:32] where first 32 interrupts are reserved. Reviewed-by: NAlessandro Rubin <rubini@unipv.it> Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-