Split up all the hardware register definitions previously found in
hardware.h into per-SoC files db8500-regs.h and db5500-regs.h.  Rename a
couple of macros to prepare for sharing code between the variants.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This adds the different config options for SoCs DB8500 and DB5500 and
refines the SoC/CPU detection code to support the DB5500 as well via
these.  The selection between DB5500 and DB8500 is currently a simple
compile-time choice.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add support for the GPIOs on the U8500, using the plat-nomadik GPIO
driver.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add cpu_is_u8500{ed/v1}() functions to determine the variant based on
the CPU id, add the changed peripheral addresses, and fixup the MTU
address.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

There is nothing board-specific about the system timer, so move it to
the CPU file.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Correct the base addresses of the CLKRST registers.
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Makes it consistent with VMALLOC_START
Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NAndreas Fenkart <andreas.fenkart@streamunlimited.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add a static mapping for the UART and correct its virtual address in
debug-macro.S, to make DEBUG_LL/earlyprintk work.
Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Otherwise more complicated uart configuration won't be possible.
We can use r1 for tmp register for both head.S and debug.S.

NOTE: This patch depends on another patch to add the the tmp register
into all debug-macro.S files. That can be done with:

$ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/"
	arch/arm/*/include/*/debug-macro.S
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Adds core support for the ST-Ericsson U8500
platform. It supports memory mappings, binds to
the existing modules like GIC, SCU, TWD and
local timers and sets up the infrastructure for
the secondary core.
Reviewed-by: NAlessandro Rubini <rubini@unipv.it>
Reviewed-by: NLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Adds basic clock framework to the U8500 platform.
Currently it just uses the clock lookup table
and add the each entry to the clkdevice. More
complex clock management to follow soon
Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Adds register definitions, shared peripheral interrupt
numbers (SHPI) and IO mappings for the U8500 core support.
SHPI are assigned to [160:32] where first 32 interrupts
are reserved.
Reviewed-by: NAlessandro Rubin <rubini@unipv.it>
Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>