- 15 1月, 2015 11 次提交
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由 Josh Wu 提交于
Add ISI peripheral clock in sama5d3.dtsi. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
The ethernut5 is actually based on an at91sam9xe, use the correct dts include. Cc: Martin Reimann <martin.reimann@egnite.de> Cc: Tim Schendekehl <tim.schendekehl@egnite.de> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
at91sam9xe is slightly different from at91sam9260, in particular it has a different SRAM size and location. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Add nodes for the SRAM available on atmel SoCs For the at91sam9260 and the at91sam9g20, address mirroring is used to create a single contiguous SRAM range instead of declaring two separate banks. Also remove leftover TODOs in the sam9g45 file Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: correct at91sam9rl sram size => 0x10000] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Enable the RTC on the at91rm9200ek. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Add a node for the RTC available on at91rm9200. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Add node for the RTC available on the at91sam9n12. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
The sama4d4 has Special Function Registers that allow to manage DDR, OHCI, EBI and AIC interrupt redirection. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: reg size: 0x60] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
The sama5d3 has Special Function Registers that allow to manage OHCI, EBI and the UTMI clock. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> [nicolas.ferre@atmel.com: reg size: 0x60] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexander Stein 提交于
That clock should be called ac97_clk. Signed-off-by: NAlexander Stein <alexanders83@web.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
This D2 led is available for all sama5d3x-ek board. So make it a heartbeat LED. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 10 1月, 2015 1 次提交
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由 Victor Kamensky 提交于
In v3.19-rc3 tree when CONFIG_ARM_LPAE and CONFIG_DEBUG_RODATA are enabled image failed to compile with the following error: arch/arm/mm/init.c:661:14: error: ‘PMD_SECT_RDONLY’ undeclared here (not in a function) It seems that '80d6b0c2 ARM: mm: allow text and rodata sections to be read-only' and 'ded94779 ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE' commits crossed. 80d6b0c2 uses PMD_SECT_RDONLY macro but ded94779 renames it and uses software bits L_PMD_SECT_RDONLY instead. Fix is to use L_PMD_SECT_RDONLY instead PMD_SECT_RDONLY as ded94779 does in another places. Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 1月, 2015 1 次提交
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由 Andy Lutomirski 提交于
On x86_64, at least, task_pt_regs may be only partially initialized in many contexts, so x86_64 should not use it without extra care from interrupt context, let alone NMI context. This will allow x86_64 to override the logic and will supply some scratch space to use to make a cleaner copy of user regs. Tested-by: NJiri Olsa <jolsa@kernel.org> Signed-off-by: NAndy Lutomirski <luto@amacapital.net> Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: chenggang.qcg@taobao.com Cc: Wu Fengguang <fengguang.wu@intel.com> Cc: Namhyung Kim <namhyung@gmail.com> Cc: Mike Galbraith <efault@gmx.de> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Jean Pihet <jean.pihet@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Salter <msalter@redhat.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/e431cd4c18c2e1c44c774f10758527fb2d1025c4.1420396372.git.luto@amacapital.netSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 08 1月, 2015 3 次提交
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由 Grygorii Strashko 提交于
Now local variables kernel_x_start and kernel_x_end defined using 'unsigned long' type which is wrong because they represent physical memory range and will be calculated wrongly if LPAE is enabled. As result, all following code in map_lowmem() will not work correctly. For example, Keystone 2 boot is broken because kernel_x_start == 0x0000 0000 kernel_x_end == 0x0080 0000 instead of kernel_x_start == 0x0000 0008 0000 0000 kernel_x_end == 0x0000 0008 0080 0000 and as result whole low memory will be mapped with MT_MEMORY_RW permissions by code (start > kernel_x_end): } else if (start >= kernel_x_end) { map.pfn = __phys_to_pfn(start); map.virtual = __phys_to_virt(start); map.length = end - start; map.type = MT_MEMORY_RW; create_mapping(&map); } Hence, fix it by using phys_addr_t type for variables kernel_x_start and kernel_x_end. Tested-by: NMurali Karicheri <m-karicheri2@ti.com> Signed-off-by: NGrygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mark Rutland 提交于
Currently the arm page table dumping code starts dumping page tables from USER_PGTABLES_CEILING. This is unnecessary for skipping any entries related to userspace as the swapper_pg_dir does not contain such entries, and results in a couple of unfortuante side effects. Firstly, any kernel mappings which might exist below USER_PGTABLES_CEILING will not be accounted in the dump output. This masks any entries erroneously created below this address. Secondly, if the final page table entry walked is part of a valid mapping the page table dumping code will not log the region this entry is part of, as the final note_page call in walk_pgd will trigger an early return when 0 < USER_PGTABLES_CEILING. Luckily this isn't seen on contemporary systems as they typically don't have enough RAM to extend the linear mapping right to the end of the address space. Due to the way addr is constructed in the walk_* functions, it can never be less than USER_PGTABLES_CEILING when walking the page tables, so it is not necessary to avoid dereferencing invalid table addresses. The existing checks for st->current_prot and st->marker[1].start_address are sufficient to ensure we will not print and/or dereference garbage when trying to log information. This patch removes both problematic uses of USER_PGTABLES_CEILING from the arm page table dumping code, preventing both of these issues. We will now report any low mappings, and the final note_page call will not return early, ensuring all regions are logged. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Cc: Steve Capper <steve.capper@linaro.org> Cc: Kees Cook <keescook@chromium.org> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 1月, 2015 1 次提交
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由 Pavel Machek 提交于
Commit 9fc2105a ("ARM: 7830/1: delay: don't bother reporting bogomips in /proc/cpuinfo") breaks audio in python, and probably elsewhere, with message FATAL: cannot locate cpu MHz in /proc/cpuinfo I'm not the first one to hit it, see for example https://theredblacktree.wordpress.com/2014/08/10/fatal-cannot-locate-cpu-mhz-in-proccpuinfo/ https://devtalk.nvidia.com/default/topic/765800/workaround-for-fatal-cannot-locate-cpu-mhz-in-proc-cpuinf/?offset=1 Reading original changelog, I have to say "Stop breaking working setups. You know who you are!". Signed-off-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 12月, 2014 1 次提交
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由 Steev Klimaszewski 提交于
Currently we enable Exynos devices in the multi v7 defconfig, however, when testing on my ODROID-U3, I noticed that USB was not working. Enabling this option causes USB to work, which enables networking support as well since the ODROID-U3 has networking on the USB bus. [arnd] Support for odroid-u3 was added in 3.10, so it would be nice to backport this fix at least that far. Signed-off-by: NSteev Klimaszewski <steev@gentoo.org> Cc: stable@vger.kernel.org # 3.10 Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 12月, 2014 1 次提交
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由 Gregory CLEMENT 提交于
The commit b4607572 (ARM: mvebu: remove conflicting muxing on Armada 370 DB) removes the hog pins muxing. As it is explained in the commit log it solves a warning a boot time, but more important it also allows using the Giga port 0 of the board. Unfortunately in the same time the commit 4904a82a (arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsi) was merged and it introduced again the hog pins muxing. Because of it, the Giga port 0 of the board is no more usable. This commit remove again the conflicting muxing (hopefully for the last time). Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> [andrew@lunn.ch: Correct commit IDs] Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Fixes: 4904a82a ("arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsi")
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- 20 12月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
Having switched over all of the users of CONFIG_PM_RUNTIME to use CONFIG_PM directly, turn the latter into a user-selectable option and drop the former entirely from the tree. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NKevin Hilman <khilman@linaro.org>
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- 18 12月, 2014 1 次提交
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由 Christian Borntraeger 提交于
ACCESS_ONCE does not work reliably on non-scalar types. For example gcc 4.6 and 4.7 might remove the volatile tag for such accesses during the SRA (scalar replacement of aggregates) step (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145) Change the spinlock code to replace ACCESS_ONCE with READ_ONCE. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
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- 16 12月, 2014 3 次提交
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由 Tero Kristo 提交于
The new usage of determine_rate and set_rate_and_parent calls for OMAP DPLLs assumes the DPLLs must have two parents defined, even if it is the same clock. Legacy clock data did not fullfill this requirement and caused a boot crash. Fixed by adding the missing parent information to the DPLL clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 2e1a7b01 ("ARM: OMAP3+: DPLL: use determine_rate() and...") Cc: Paul Walmsley <paul@pwsan.com> Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
While the change for determine_rate clock operation was merged, the OMAP counterpart using these calls was overlooked for some reason, and caused boot failures on at least OMAP4 platforms. Fixed by updating the DPLL API calls to use the new parameters. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 646cafc6 ("clk: Change clk_ops->determine_rate") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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由 Viresh Kumar 提交于
CONFIG_GENERIC_CPUFREQ_CPU0 disappeared with commit bbcf0719 ("cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'") and some defconfigs are still using it instead of the new one. Use the renamed CONFIG_CPUFREQ_DT generic driver. Cc: <stable@vger.kernel.org> # 3.18 Reported-by: NNishanth Menon <nm@ti.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 15 12月, 2014 1 次提交
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由 Christoffer Dall 提交于
It is curently possible to run a VM with architected timers support without creating an in-kernel VGIC, which will result in interrupts from the virtual timer going nowhere. To address this issue, move the architected timers initialization to the time when we run a VCPU for the first time, and then only initialize (and enable) the architected timers if we have a properly created and initialized in-kernel VGIC. When injecting interrupts from the virtual timer to the vgic, the current setup should ensure that this never calls an on-demand init of the VGIC, which is the only call path that could return an error from kvm_vgic_inject_irq(), so capture the return value and raise a warning if there's an error there. We also change the kvm_timer_init() function from returning an int to be a void function, since the function always succeeds. Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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- 14 12月, 2014 1 次提交
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由 Riku Voipio 提交于
Following the suggestions from Andrew Morton and Stephen Rothwell, Dont expand the ARCH list in kernel/gcov/Kconfig. Instead, define a ARCH_HAS_GCOV_PROFILE_ALL bool which architectures can enable. set ARCH_HAS_GCOV_PROFILE_ALL on Architectures where it was previously allowed + ARM64 which I tested. Signed-off-by: NRiku Voipio <riku.voipio@linaro.org> Cc: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 12月, 2014 11 次提交
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由 Christoffer Dall 提交于
When the vgic initializes its internal state it does so based on the number of VCPUs available at the time. If we allow KVM to create more VCPUs after the VGIC has been initialized, we are likely to error out in unfortunate ways later, perform buffer overflows etc. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
The vgic_initialized() macro currently returns the state of the vgic->ready flag, which indicates if the vgic is ready to be used when running a VM, not specifically if its internal state has been initialized. Rename the macro accordingly in preparation for a more nuanced initialization flow. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Peter Maydell 提交于
VGIC initialization currently happens in three phases: (1) kvm_vgic_create() (triggered by userspace GIC creation) (2) vgic_init_maps() (triggered by userspace GIC register read/write requests, or from kvm_vgic_init() if not already run) (3) kvm_vgic_init() (triggered by first VM run) We were doing initialization of some state to correspond with the state of a freshly-reset GIC in kvm_vgic_init(); this is too late, since it will overwrite changes made by userspace using the register access APIs before the VM is run. Move this initialization earlier, into the vgic_init_maps() phase. This fixes a bug where QEMU could successfully restore a saved VM state snapshot into a VM that had already been run, but could not restore it "from cold" using the -loadvm command line option (the symptoms being that the restored VM would run but interrupts were ignored). Finally rename vgic_init_maps to vgic_init and renamed kvm_vgic_init to kvm_vgic_map_resources. [ This patch is originally written by Peter Maydell, but I have modified it somewhat heavily, renaming various bits and moving code around. If something is broken, I am to be blamed. - Christoffer ] Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
Introduce a new function to unmap user RAM regions in the stage2 page tables. This is needed on reboot (or when the guest turns off the MMU) to ensure we fault in pages again and make the dcache, RAM, and icache coherent. Using unmap_stage2_range for the whole guest physical range does not work, because that unmaps IO regions (such as the GIC) which will not be recreated or in the best case faulted in on a page-by-page basis. Call this function on secondary and subsequent calls to the KVM_ARM_VCPU_INIT ioctl so that a reset VCPU will detect the guest Stage-1 MMU is off when faulting in pages and make the caches coherent. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
When a vcpu calls SYSTEM_OFF or SYSTEM_RESET with PSCI v0.2, the vcpus should really be turned off for the VM adhering to the suggestions in the PSCI spec, and it's the sane thing to do. Also, clarify the behavior and expectations for exits to user space with the KVM_EXIT_SYSTEM_EVENT case. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
It is not clear that this ioctl can be called multiple times for a given vcpu. Userspace already does this, so clarify the ABI. Also specify that userspace is expected to always make secondary and subsequent calls to the ioctl with the same parameters for the VCPU as the initial call (which userspace also already does). Add code to check that userspace doesn't violate that ABI in the future, and move the kvm_vcpu_set_target() function which is currently duplicated between the 32-bit and 64-bit versions in guest.c to a common static function in arm.c, shared between both architectures. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
When userspace resets the vcpu using KVM_ARM_VCPU_INIT, we should also reset the HCR, because we now modify the HCR dynamically to enable/disable trapping of guest accesses to the VM registers. This is crucial for reboot of VMs working since otherwise we will not be doing the necessary cache maintenance operations when faulting in pages with the guest MMU off. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
The implementation of KVM_ARM_VCPU_INIT is currently not doing what userspace expects, namely making sure that a vcpu which may have been turned off using PSCI is returned to its initial state, which would be powered on if userspace does not set the KVM_ARM_VCPU_POWER_OFF flag. Implement the expected functionality and clarify the ABI. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
If a VCPU was originally started with power off (typically to be brought up by PSCI in SMP configurations), there is no need to clear the POWER_OFF flag in the kernel, as this flag is only tested during the init ioctl itself. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so Kconfig options depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace PM_RUNTIME with PM in Kconfig dependencies throughout the tree. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NFelipe Balbi <balbi@ti.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NTejun Heo <tj@kernel.org>
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere in the code under arch/arm/ (the defconfig files will be modified later). Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NNishanth Menon <nm@ti.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
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- 12 12月, 2014 1 次提交
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由 Alexander Duyck 提交于
There are a number of situations where the mandatory barriers rmb() and wmb() are used to order memory/memory operations in the device drivers and those barriers are much heavier than they actually need to be. For example in the case of PowerPC wmb() calls the heavy-weight sync instruction when for coherent memory operations all that is really needed is an lsync or eieio instruction. This commit adds a coherent only version of the mandatory memory barriers rmb() and wmb(). In most cases this should result in the barrier being the same as the SMP barriers for the SMP case, however in some cases we use a barrier that is somewhere in between rmb() and smp_rmb(). For example on ARM the rmb barriers break down as follows: Barrier Call Explanation --------- -------- ---------------------------------- rmb() dsb() Data synchronization barrier - system dma_rmb() dmb(osh) data memory barrier - outer sharable smp_rmb() dmb(ish) data memory barrier - inner sharable These new barriers are not as safe as the standard rmb() and wmb(). Specifically they do not guarantee ordering between coherent and incoherent memories. The primary use case for these would be to enforce ordering of reads and writes when accessing coherent memory that is shared between the CPU and a device. It may also be noted that there is no dma_mb(). Most architectures don't provide a good mechanism for performing a coherent only full barrier without resorting to the same mechanism used in mb(). As such there isn't much to be gained in trying to define such a function. Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: David Miller <davem@davemloft.net> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 12月, 2014 2 次提交
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由 Heikki Krogerus 提交于
commit dbc98635 ("phy: remove the old lookup method") removes struct phy_consumer but twl-common.c still uses the "phy_consumer" structure resulting in the following compilation warning. arch/arm/mach-omap2/twl-common.c:94:21: error: array type has incomplete element type struct phy_consumer consumers[] = { Removed using phy_consumer since twl4030 uses the new lookup method. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NGreg Kroah-Hartman <greg@kroah.com>
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由 Johan Hovold 提交于
Drop the vendor-prefix from the "ti,system-power-controller" device-tree property name. It has been agreed to make "system-power-controller" a standard property and to drop the vendor-prefix that is currently used by several drivers. Note that drivers that have used "<vendor>,system-power-controller" in a released kernel will need to support both versions. Signed-off-by: NJohan Hovold <johan@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Benot Cousson <bcousson@baylibre.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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