For "unlock" cycles to 16bit devices in 8bit compatibility mode we need
to use the byte addresses 0xaaa and 0x555. These effectively match
the word address 0x555 and 0x2aa, except the latter has its low bit set.

Most chips don't care about the value of the 'A-1' pin in x8 mode,
but some -- like the ST M29W320D -- do. So we need to be careful to
set it where appropriate.

cfi_send_gen_cmd is only ever passed addresses where the low byte
is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are
affected by this patch, by masking in the extra low bit when the device
is known to be in compatibility mode.

[dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa]
v4: Fix  stupid typo in cfi_build_cmd_addr that failed to compile
    I'm writing this patch way to late at night.
v3: Bring all of the work back into cfi_build_cmd_addr
    including calling of map_bankwidth(map) and cfi_interleave(cfi)
    So every caller doesn't need to.
v2: Only modified the address if we our device_type is larger than our
    bus width.

Cc: stable@kernel.org
Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

They need to be exported, so let's give them less generic-sounding names
while we're at it.

Original export patch, along with the suggestion about the nomenclature,
from Stephen Rothwell.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

There are some CFI chips which require non standard procedures to get 
into QRY mode. The possible way to support them would be trying 
different modes till QRY will be read. This patch introduce two new 
functions qry_mode_on qry_mode_off. qry_mode_on tries different commands 
in order switch chip into QRY mode.

So if we have one more "odd" chip - we just could add several lines to 
qry_mode_on. Also using these functions remove unnecessary code 
duplicaton in porbe procedure.

Currently there are two "odd" cases
1. Some old intel chips which require 0xFF before 0x98
2. ST M29DW chip which requires 0x98 to be sent at 0x555 (according to
CFI should be 0x55)

This patch is partialy based on the patch from Uwe
(see "[PATCH 2/4] [RFC][MTD] cfi_probe: remove Intel chip workaround"
thread )
Signed-off-by: NAlexey Korolev <akorolev@infradead.org>
Signed-off-by: NAlexander Belyakov <abelyako@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Once upon a time, the MTD repository was using CVS.

This patch therefore removes all usages of the no longer updated CVS
keywords from the MTD code.

This also includes code that printed them to the user.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

According to "Common Flash Memory Interface Publication 100" dated December 1,
2001, the interface code for x16/x32 chips is 0x0005, and not 0x0004 used so
far.
Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

When building NOR flash support, you have compile-time options for the
bus width and the number of individual chips which are interleaved
together onto that bus. The code to deal with arbitrary geometry is a
bit convoluted, and people want to just configure it for the specific
hardware they have, to avoid the runtime overhead.

Selecting _none_ of the available options doesn't make any sense. You
should have at least one. This makes it build though, since people
persist in trying.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Atmel flash chips don't have PRI information in the same format as
AMD flash chips. This patch installs a fixup for all Atmel chips that
converts the relevant PRI fields into AMD format.

Only the fields that are actually used by the command set is actually
converted. The rest are initialized to zero (which should be safe)
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NJosh Boyer <jwboyer@gmail.com>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Recent models of Intel/Sharp and Spansion CFI flash now have significant
bits in the upper byte of device ID codes, read via what Spansion calls
"autoselect" and Intel calls "read device identifier".  Currently these
values are truncated to the low 8 bits in the mtd data structures, as
all CFI read query info has previously been read one byte at a time.
Add a new method for reading 16-bit info, currently just manufacturer
and device codes; datasheets hint at future uses for upper bytes in
other fields.
Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch removes almost all inclusions of linux/version.h.  The 3
#defines are unused in most of the touched files.

A few drivers use the simple KERNEL_VERSION(a,b,c) macro, which is
unfortunatly in linux/version.h.

There are also lots of #ifdef for long obsolete kernels, this was not
touched.  In a few places, the linux/version.h include was move to where
the LINUX_VERSION_CODE was used.

quilt vi `find * -type f -name "*.[ch]"|xargs grep -El '(UTS_RELEASE|LINUX_VERSION_CODE|KERNEL_VERSION|linux/version.h)'|grep -Ev '(/(boot|coda|drm)/|~$)'`

search pattern:
/UTS_RELEASE\|LINUX_VERSION_CODE\|KERNEL_VERSION\|linux\/\(utsname\|version\).h
Signed-off-by: NOlaf Hering <olh@suse.de>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This updates the Primary Vendor-Specific Extended Query parsing to
version 1.4 in order to get the information about the Configurable
Programming Mode regions implemented in the Sibley flash, as well as
selecting the appropriate write command code.

This flash does not behave like traditional NOR flash when writing data.
While mtdblock should just work, further changes are needed for JFFS2 use.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Author: Vitaly Wool <vwool@ru.mvista.com>
Signed-off-by: NTodd Poynor <tpoynor@mvista.com>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This is necessary to fix the broken status check in cfi_cmdset_0001
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This enables support for reading, writing and locking so called
"Protection Registers" present on some flash chips.
A subset of them are pre-programmed at the factory with a
unique set of values. The rest is user-programmable.
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

add structure definition for OTP region info
Signed-off-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!