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      [CPUFREQ] Add S3C2416/S3C2450 cpufreq driver · 34ee5507
      Heiko Stübner 提交于
      The S3C2416/S3C2450 SoCs support two sources for the armclk.
      
      The first source is the so called armdiv which divides the msysclk down
      to provide necessary cpu rates. In this mode the core voltage must be
      always at 1.3V. The frequency from the armdiv is not allowed to be
      lower than the hclk frequency.
      
      In the second mode the armclk can be sourced directly from the hclk in
      the so called "dynamic voltags scaling" (dvs) mode. Here the armdiv
      isn't used at all. Also in this mode the core voltage may be lowered.
      Existing hardware and tests with it suggest 1.0V as sufficient.
      
      When changing the clock source to the armdiv from the hclk, the SoC
      shows stability issues if the new frequency is higher than the current
      hclk frequency. Hence the driver always forces the armdiv to the hclk
      frequency before the source change and lets the cpufreq issue another
      set_target call for higher frequencies.
      
      To mark the hclk frequency as lower as the corresponding armdiv
      frequency it is set 1MHz below the real frequency. This lets the cpufreq
      framework change between 133MHz based on hclk and 133MHz based on armdiv
      at will.
      Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
      Tested-by: NAndrey Gusakov <dron0gus@gmail.com>
      Signed-off-by: NDave Jones <davej@redhat.com>
      34ee5507