- 25 6月, 2012 4 次提交
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由 Felipe Balbi 提交于
whenever we want to stall ep0, we always call dwc3_ep0_stall_and_restart() which makes sure to send ep0state properly rendering the code in __dwc3_gadget_ep_set_halt() duplicated. Reported-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
resource_index is more human readable. No functional changes. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
It makes it easier to read and also avoids setting DWC3_EP_PENDING_REQUEST just so the next branch evaluates true. No functional changes otherwise. Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
Now we are sure that, if res_trans_idx is zero, then endpoint has been stopped. So it's safe to just return if endpoint is already stopped. No need to generate warning anymore. While doing so, it's better to return when res_trans_idx is zero and decrease one level of indentation. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> [ balbi@ti.com: slightly changed commit log ] Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 22 6月, 2012 3 次提交
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由 Pratyush Anand 提交于
Synopsys specification clearly states under section "Device Power-On or Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow what specification says. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
Before taking core out of reset phy must be stable. So wait for 100ms after clear phy reset. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Sachin Kamat 提交于
module.h header file was included twice. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 15 6月, 2012 1 次提交
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由 Pratyush Anand 提交于
In case of ep_disable and reset interrupt is received and, still there was at least one request queued for dma transfer, then endpoint is stopped first. Once endpoint is stopped, callback for all queued request must be called. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 06 6月, 2012 6 次提交
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由 Pratyush Anand 提交于
It is needed to enumerate recent cores like 2.10a. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
The definition of DWC3_DCTL_HIRD_THRES macro is completely wrong. It will only work for when we want to read the register's contents for that bitfield. Change the macro so that it can be used to writing to the register, and when we need to read, we can add extra right shift of 24 bits. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> [ balbi@ti.com: add a commit log ] Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
By the time we're disabling the endpoint, HW could already have posted more events to our event buffer. In that case, we will receive endpoint events for a disabled endpoint. In order to protect ourselves from that situation, we simply ignore endpoint interrupts whenever the endpoint is disabled. Tested-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
In case we get disconnected, we will call gadget driver's disconnect method, which should make sure to disable all endpoints. At that point we will call stop_active_transfers() to make sure we didn't leave any pending request on the controller. Tested-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
That IRQ is causing way too much trouble. We have a different handling which was agreed with IP provider and has been tested with FPGA and OMAP5. Tested-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
We never set CMDIOC bit for Start Transfer command, so that code will never be used. Tested-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 04 6月, 2012 22 次提交
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由 Pratyush Anand 提交于
If event status says that its last completed TRB but TRB is still owned by HW then break from the loop, because we are not going to get correct TRB status from trb control/size register. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
If an IN transfer is missed on isoc endpoint, then driver must insure that next ep_queue is properly handled. This patch fixes this issue by starting a new transfer for next queued request. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
SOF Number is bit16:3 of DSTS. Correct the mask accordingly. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
Correct define for DWC3_TRB_SIZE_TRBSTS. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Pratyush Anand 提交于
Currently in case of isoc, interrupt is programmed after each TRB_NUM/4 ie 8th TRB. A TRB is programmed against each submitted request from gadget. If we do not want to limit the minimum number of necessary request to be submitted from gadget then we must receive interrupt on each TRB submission. There can be such situation with a gadget working with ping-pong buffer. If a gadget does not want to receive interrupt after each request completion then it may set no_interrupt flag. Signed-off-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
That's a much more intuitive name as that function is only called at the completion of a Status Phase. It also matches dwc3_ep0_complete_data() for the completion of Data Phase. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
USB is always little endian, but this driver could run on non little endian cpus. Let's be carefull with that. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
There's no need for returning early. Instead, we can call dwc3_ep0_stall_and_restart() conditionally. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Gerard CAUVY 提交于
According to the databook, the DWC3 Core will reset those bits to 0 on USB Bus Reset. This means we must re-enable those bits on every reset interrupt. Because we will always get a Reset interrupt after loading a gadget driver, we can, instead of re-enabling something that was just lost, move the handling of those bits to the Reset Interrupt. This patch fixes USB30CV U1/U2 Test. Signed-off-by: NGerard CAUVY <g-cauvy1@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
If we get a disconnect IRQ, we should take the core out of low power mode so we can reconnect afterwards. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
If we don't read out the contents of the register (in order to reinitialize 'reg' variable) we will be writing unknown contents to the DCTL register whenever we try to use dwc3_gadget_wakeup() function. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Paul Zimmerman 提交于
The same event buffers will be reused when coming out of hibernation, so we must reinitialize them properly to avoid any mistakes. While at that, also take dwc3_event_buffers_setup() out of __devinit section. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Paul Zimmerman 提交于
Recent cores (>= 1.94a) have a set of new features, commands and a slightly different programming model. This patch aims to support those changes. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Paul Zimmerman 提交于
those two functions don't power PHYs, they simply put them in suspend state. Rename to reflect better what functions actually do. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Paul Zimmerman 提交于
retries is used twice without being reinitialized. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Paul Zimmerman 提交于
This patch adds definitions for some new registers that have been added to later versions of the controller, up to v2.10a. Signed-off-by: NPaul Zimmerman <paulz@synopsys.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
That semicolon doesn't do anything, it's not needed and should be removed. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
s/has/have. No functional changes, just a typo fix on a code comment. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
On our Transfer Not Ready handlers, only dwc3_ep0_do_control_status() had a different list of parameters. Align on the parameters in order to keep consistency. No functional changes. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
IS_ALIGNED provides a much faster operation for checking proper size alignment then a modulo operation. Let's use it. Reported-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
When DWC3_EP_PENDING_REQUEST flag is set for a Control OUT Data phase transfer, we would be missing the proper handling for unaligned OUT requests, thus hanging a transfer. Since proper handling is already done on dwc3_ep0_do_control_data(), we simply re-factor that function so it can be re-used from __dwc3_gadget_ep0_queue(). Reported-by: NPratyush Anand <pratyush.anand@st.com> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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由 Felipe Balbi 提交于
we're now have DWC3_EP0_BOUNCE_SIZE to tell us the actual size of the bufer. Let's use that instead of ep0 wMaxPacketSize. Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 03 6月, 2012 4 次提交
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由 Linus Torvalds 提交于
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git://git.kernel.org/pub/scm/linux/kernel/git/agk/linux-dm由 Linus Torvalds 提交于
Pull device-mapper updates from Alasdair G Kergon: "Improve multipath's retrying mechanism in some defined circumstances and provide a simple reserve/release mechanism for userspace tools to access thin provisioning metadata while the pool is in use." * tag 'dm-3.5-changes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agk/linux-dm: dm thin: provide userspace access to pool metadata dm thin: use slab mempools dm mpath: allow ioctls to trigger pg init dm mpath: delay retry of bypassed pg dm mpath: reduce size of struct multipath
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由 Joe Thornber 提交于
This patch implements two new messages that can be sent to the thin pool target allowing it to take a snapshot of the _metadata_. This, read-only snapshot can be accessed by userland, concurrently with the live target. Only one metadata snapshot can be held at a time. The pool's status line will give the block location for the current msnap. Since version 0.1.5 of the userland thin provisioning tools, the thin_dump program displays the msnap as follows: thin_dump -m <msnap root> <metadata dev> Available here: https://github.com/jthornber/thin-provisioning-tools Now that userland can access the metadata we can do various things that have traditionally been kernel side tasks: i) Incremental backups. By using metadata snapshots we can work out what blocks have changed over time. Combined with data snapshots we can ensure the data doesn't change while we back it up. A short proof of concept script can be found here: https://github.com/jthornber/thinp-test-suite/blob/master/incremental_backup_example.rb ii) Migration of thin devices from one pool to another. iii) Merging snapshots back into an external origin. iv) Asyncronous replication. Signed-off-by: NJoe Thornber <ejt@redhat.com> Signed-off-by: NAlasdair G Kergon <agk@redhat.com>
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由 Mike Snitzer 提交于
Use dedicated caches prefixed with a "dm_" name rather than relying on kmalloc mempools backed by generic slab caches so the memory usage of thin provisioning (and any leaks) can be accounted for independently. Signed-off-by: NMike Snitzer <snitzer@redhat.com> Signed-off-by: NAlasdair G Kergon <agk@redhat.com>
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