1. 07 3月, 2016 1 次提交
  2. 17 2月, 2016 1 次提交
  3. 11 2月, 2016 8 次提交
  4. 26 1月, 2016 2 次提交
    • J
      net: fec: use CONFIG_ARM instead of CONFIG_ARCH_MXC/SOC_IMX28 · 05f3b50e
      Johannes Berg 提交于
      As Arnd Bergmann points out, using CONFIG_ARCH_MXC and/or SOC_IMX28
      is wrong if some other ARM platform uses this device - the operation
      of the driver would depend on an unrelated ARM platform that might
      or might not be set for multi-platform kernels.
      
      Prior to my previous patch, any other platforms using it would have
      been broken already due to having the cbd_datlen/cbd_sc fields in
      the wrong order, but byte ordering correctly, so no such platforms
      can exist and work today.
      
      In any case, it seems likely that only Freescale SoCs use this part,
      and those are little-endian on ARM, so CONFIG_ARM is safe for them.
      Signed-off-by: NJohannes Berg <johannes@sipsolutions.net>
      Reviewed-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      05f3b50e
    • J
      net: fec: make driver endian-safe · 5cfa3039
      Johannes Berg 提交于
      The driver treats the device descriptors as CPU-endian, which appears
      to be correct with the default endianness on both ARM (typically LE)
      and PowerPC (typically BE) SoCs, indicating that the hardware block
      is generated differently. Add endianness annotations and byteswaps as
      necessary.
      
      It's not clear that the ifdef there really is correct and shouldn't
      just be #ifdef CONFIG_ARM, but I also can't test on anything but the
      i.MX6 HummingBoard where this gets it working with a BE kernel.
      Signed-off-by: NJohannes Berg <johannes@sipsolutions.net>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5cfa3039
  5. 08 1月, 2016 3 次提交
  6. 25 11月, 2015 1 次提交
  7. 02 11月, 2015 1 次提交
  8. 29 9月, 2015 1 次提交
  9. 10 9月, 2015 1 次提交
    • N
      net: fec: add netif status check before set mac address · 9638d19e
      Nimrod Andy 提交于
      There exist one issue by below case that case system hang:
      ifconfig eth0 down
      ifconfig eth0 hw ether 00:10:19:19:81:19
      
      After eth0 down, all fec clocks are gated off. In the .fec_set_mac_address()
      function, it will set new MAC address to registers, which causes system hang.
      
      So it needs to add netif status check to avoid registers access when clocks are
      gated off. Until eth0 up the new MAC address are wrote into related registers.
      
      V2:
      As Lucas Stach's suggestion, add a comment in the code to explain why it needed.
      
      CC: Lucas Stach <l.stach@pengutronix.de>
      CC: Florian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NFugang Duan <B38611@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      9638d19e
  10. 06 9月, 2015 1 次提交
  11. 03 9月, 2015 1 次提交
  12. 26 8月, 2015 1 次提交
    • R
      net: fec: use reinit_completion() in mdio accessor functions · aac27c7a
      Russell King 提交于
      Rather than re-initialising the entire completion on every mdio access,
      use reinit_completion() which only resets the completion count.  This
      avoids possible reinitialisation of the contained spinlock and waitqueue
      while they may be in use (eg, mid-completion.)
      
      Such an event could occur if there's a long delay in interrupt handling
      causing the mdio accessor to time out, then a second access comes in
      while the interrupt handler on a different CPU has called complete().
      Another scenario where this has been observed is while locking has
      been missing at the phy layer, allowing concurrent attempts to access
      the MDIO bus.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aac27c7a
  13. 13 8月, 2015 1 次提交
  14. 11 8月, 2015 1 次提交
    • K
      net: fec: fix the race between xmit and bdp reclaiming path · c4bc44c6
      Kevin Hao 提交于
      When we transmit a fragmented skb, we may run into a race like the
      following scenario (assume txq->cur_tx is next to txq->dirty_tx):
                 cpu 0                                          cpu 1
        fec_enet_txq_submit_skb
          reserve a bdp for the first fragment
          fec_enet_txq_submit_frag_skb
             update the bdp for the other fragment
             update txq->cur_tx
                                                         fec_enet_tx_queue
                                                           bdp = fec_enet_get_nextdesc(txq->dirty_tx, fep, queue_id);
                                                           This bdp is the bdp reserved for the first segment. Given
                                                           that this bdp BD_ENET_TX_READY bit is not set and txq->cur_tx
                                                           is already pointed to a bdp beyond this one. We think this is a
                                                           completed bdp and try to reclaim it.
          update the bdp for the first segment
          update txq->cur_tx
      
      So we shouldn't update the txq->cur_tx until all the update to the
      bdps used for fragments are performed. Also add the corresponding
      memory barrier to guarantee that the update to the bdps, dirty_tx and
      cur_tx performed in the proper order.
      Signed-off-by: NKevin Hao <haokexin@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c4bc44c6
  15. 07 8月, 2015 1 次提交
  16. 27 7月, 2015 3 次提交
  17. 16 7月, 2015 1 次提交
  18. 09 7月, 2015 1 次提交
    • A
      net: fec: Ensure clocks are enabled while using mdio bus · 6c3e921b
      Andrew Lunn 提交于
      When a switch is attached to the mdio bus, the mdio bus can be used
      while the interface is not open. If the IPG clock is not enabled, MDIO
      reads/writes will simply time out.
      
      Add support for runtime PM to control this clock. Enable/disable this
      clock using runtime PM, with open()/close() and mdio read()/write()
      function triggering runtime PM operations. Since PM is optional, the
      IPG clock is enabled at probe and is no longer modified by
      fec_enet_clk_enable(), thus if PM is not enabled in the kernel, it is
      guaranteed the clock is running when MDIO operations are performed.
      Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
      Acked-by: NFugang Duan <B38611@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      6c3e921b
  19. 29 6月, 2015 1 次提交
    • G
      net: fec: don't access RACC register when not available · 18803495
      Greg Ungerer 提交于
      Not all silicon implementations of the Freescale FEC hardware module
      have the RACC (Receive Accelerator Function) register, so we should not
      be trying to access it on those that don't. Currently none of the ColdFire
      based parts with a FEC have it.
      
      Support for RACC was introduced by commit 4c09eed9 ("net: fec: Enable imx6
      enet checksum acceleration"). A fix was introduced in commit d1391930
      ("net: fec: Fix build for MCF5272") that disables its use on the ColdFire
      M5272 part, but it doesn't fix the general case of other ColdFire parts.
      
      To fix we create a quirk flag, FEC_QUIRK_HAS_RACC, and check it before
      working with the RACC register.
      Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      18803495
  20. 23 6月, 2015 1 次提交
    • N
      net: fec: init MAC prior to mii bus probe · 55dd2753
      Nimrod Andy 提交于
      Below case causes mii bus probe failed:
      ifconfig eth0 down -> suspend/resume with Mega/fax mix off -> ifconfig eth0 up
      
      In i.MX6SX/i.MX7D chip, Mega/fast mix off feature is supported that means most of
      SOC power will be off including ENET MAC for power saving. Once ENET MAC power
      off, all initialized MAC registers reset to default, so in the case, it must
      init MAC prior to mii bus probe.
      Signed-off-by: NFugang Duan <B38611@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      55dd2753
  21. 12 5月, 2015 1 次提交
  22. 01 5月, 2015 1 次提交
  23. 30 3月, 2015 1 次提交
  24. 14 3月, 2015 1 次提交
  25. 11 3月, 2015 1 次提交
  26. 06 3月, 2015 1 次提交
  27. 05 3月, 2015 1 次提交
    • F
      net: fec: fix rcv is not last issue when do suspend/resume test · 61615cd2
      Fugang Duan 提交于
      When do suspend/resume stress test, some log shows "rcv is not +last".
      The issue is that enet suspend will disable phy clock, phy link down,
      after resume back, enet MAC redo initial and ready to tx/rx packet,
      but phy still is not ready which is doing auto-negotiation. When phy
      link is not up, don't schdule napi soft irq.
      
      [Peter]
      It has fixed kernel panic after long time suspend/resume test
      with nfs rootfs.
      
      [ 8864.429458] fec 2188000.ethernet eth0: rcv is not +last
      [ 8864.434799] fec 2188000.ethernet eth0: rcv is not +last
      [ 8864.440088] fec 2188000.ethernet eth0: rcv is not +last
      [ 8864.445424] fec 2188000.ethernet eth0: rcv is not +last
      [ 8864.450782] fec 2188000.ethernet eth0: rcv is not +last
      [ 8864.456111] Unable to handle kernel NULL pointer dereference at virtual address 00000000
      [ 8864.464225] pgd = 80004000
      [ 8864.466997] [00000000] *pgd=00000000
      [ 8864.470627] Internal error: Oops: 17 [#1] SMP ARM
      [ 8864.475353] Modules linked in: evbug
      [ 8864.479006] CPU: 0 PID: 3 Comm: ksoftirqd/0 Not tainted 4.0.0-rc1-00044-g7a2a1d2 #234
      [ 8864.486854] Hardware name: Freescale i.MX6 SoloX (Device Tree)
      [ 8864.492709] task: be069380 ti: be07a000 task.ti: be07a000
      [ 8864.498137] PC is at memcpy+0x80/0x330
      [ 8864.501919] LR is at gro_pull_from_frag0+0x34/0xa8
      [ 8864.506735] pc : [<802bb080>]    lr : [<8057c204>]    psr: 00000113
      [ 8864.506735] sp : be07bbd4  ip : 00000010  fp : be07bc0c
      [ 8864.518235] r10: 0000000e  r9 : 00000000  r8 : 809c7754
      [ 8864.523479] r7 : 809c7754  r6 : bb43c040  r5 : bd280cc0  r4 : 00000012
      [ 8864.530025] r3 : 00000804  r2 : fffffff2  r1 : 00000000  r0 : bb43b83c
      [ 8864.536575] Flags: nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
      [ 8864.543904] Control: 10c5387d  Table: bd14c04a  DAC: 00000015
      [ 8864.549669] Process ksoftirqd/0 (pid: 3, stack limit = 0xbe07a210)
      [ 8864.555869] Stack: (0xbe07bbd4 to 0xbe07c000)
      [ 8864.560250] bbc0:                                              bd280cc0 bb43c040 809c7754
      [ 8864.568455] bbe0: 809c7754 bb43b83c 00000012 8057c204 00000000 bd280cc0 bd8a0718 00000003
      [ 8864.576658] bc00: be07bc5c be07bc10 8057ebf0 8057c1dc 00000000 00000000 8057ecc4 bef59760
      [ 8864.584863] bc20: 00000002 bd8a0000 be07bc64 809c7754 00000000 bd8a0718 bd280cc0 bd8a0000
      [ 8864.593066] bc40: 00000000 0000001c 00000000 bd8a0000 be07bc74 be07bc60 8057f148 8057eb90
      [ 8864.601268] bc60: bf0810a0 00000000 be07bcf4 be07bc78 8044e7b4 8057f12c 00000000 8007df6c
      [ 8864.609470] bc80: bd8a0718 00000040 00000000 bd280a80 00000002 00000019 bd8a0600 bd8a1214
      [ 8864.617672] bca0: bd8a0690 bf0810a0 00000000 00000000 bd8a1000 00000000 00000027 bd280cc0
      [ 8864.625874] bcc0: 80062708 800625cc 000943db bd8a0718 00000001 000d1166 00000040 be7c1ec0
      [ 8864.634077] bce0: 0000012c be07bd00 be07bd3c be07bcf8 8057fc98 8044e3ac 809c2ec0 3ddff000
      [ 8864.642280] bd00: be07bd00 be07bd00 be07bd08 be07bd08 00000000 00000020 809c608c 00000003
      [ 8864.650481] bd20: 809c6080 40000001 809c6088 00200100 be07bd84 be07bd40 8002e690 8057fac8
      [ 8864.658684] bd40: be07bd64 be07bd50 00000001 04208040 000d1165 0000000a be07bd84 809c0d7c
      [ 8864.666885] bd60: 00000000 809c6af8 00000000 00000001 be008000 00000000 be07bd9c be07bd88
      [ 8864.675087] bd80: 8002eb64 8002e564 00000125 809c0d7c be07bdc4 be07bda0 8006f100 8002eaac
      [ 8864.683291] bda0: c080e10c be07bde8 809c6c6c c080e100 00000002 00000000 be07bde4 be07bdc8
      [ 8864.691492] bdc0: 800087a0 8006f098 806f2934 20000013 ffffffff be07be1c be07be44 be07bde8
      [ 8864.699695] bde0: 800133a4 80008784 00000001 00000001 00000000 00000000 be7c1680 00000000
      [ 8864.707896] be00: be0cfe00 bd93eb40 00000002 00000000 00000000 be07be44 be07be00 be07be30
      [ 8864.716098] be20: 8006278c 806f2934 20000013 ffffffff be069380 be7c1680 be07be7c be07be48
      [ 8864.724300] be40: 80049cfc 806f2910 00000001 00000000 80049cb4 00000000 be07be7c be7c1680
      [ 8864.732502] be60: be3289c0 be069380 bd23b600 be0cfe00 be07bebc be07be80 806ed614 80049c68
      [ 8864.740706] be80: be07a000 0000020a 809c608c 00000003 00000001 8002e858 be07a000 be035740
      [ 8864.748907] bea0: 00000000 00000001 809d4598 00000000 be07bed4 be07bec0 806edd0c 806ed440
      [ 8864.757110] bec0: be07a000 be07a000 be07bee4 be07bed8 806edd68 806edcf0 be07bef4 be07bee8
      [ 8864.765311] bee0: 8002e860 806edd34 be07bf24 be07bef8 800494b0 8002e828 be069380 00000000
      [ 8864.773512] bf00: be035780 be035740 8004938c 00000000 00000000 00000000 be07bfac be07bf28
      [ 8864.781715] bf20: 80045928 80049398 be07bf44 00000001 00000000 be035740 00000000 00030003
      [ 8864.789917] bf40: dead4ead ffffffff ffffffff 80a2716c 80b59b00 00000000 8088c954 be07bf5c
      [ 8864.798120] bf60: be07bf5c 00000000 00000000 dead4ead ffffffff ffffffff 80a2716c 00000000
      [ 8864.806320] bf80: 00000000 8088c954 be07bf88 be07bf88 be035780 8004584c 00000000 00000000
      [ 8864.814523] bfa0: 00000000 be07bfb0 8000ed10 80045858 00000000 00000000 00000000 00000000
      [ 8864.822723] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      [ 8864.830925] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 5ffbb5f7 f9fcf5e7
      [ 8864.839115] Backtrace:
      [ 8864.841631] [<8057c1d0>] (gro_pull_from_frag0) from [<8057ebf0>] (dev_gro_receive+0x6c/0x3f8)
      [ 8864.850173]  r6:00000003 r5:bd8a0718 r4:bd280cc0 r3:00000000
      [ 8864.855958] [<8057eb84>] (dev_gro_receive) from [<8057f148>] (napi_gro_receive+0x28/0xac)
      [ 8864.864152]  r10:bd8a0000 r9:00000000 r8:0000001c r7:00000000 r6:bd8a0000 r5:bd280cc0
      [ 8864.872115]  r4:bd8a0718
      [ 8864.874713] [<8057f120>] (napi_gro_receive) from [<8044e7b4>] (fec_enet_rx_napi+0x414/0xc74)
      [ 8864.883167]  r5:00000000 r4:bf0810a0
      [ 8864.886823] [<8044e3a0>] (fec_enet_rx_napi) from [<8057fc98>] (net_rx_action+0x1dc/0x2ec)
      [ 8864.895016]  r10:be07bd00 r9:0000012c r8:be7c1ec0 r7:00000040 r6:000d1166 r5:00000001
      [ 8864.902982]  r4:bd8a0718
      [ 8864.905570] [<8057fabc>] (net_rx_action) from [<8002e690>] (__do_softirq+0x138/0x2c4)
      [ 8864.913417]  r10:00200100 r9:809c6088 r8:40000001 r7:809c6080 r6:00000003 r5:809c608c
      [ 8864.921382]  r4:00000020
      [ 8864.923966] [<8002e558>] (__do_softirq) from [<8002eb64>] (irq_exit+0xc4/0x138)
      [ 8864.931289]  r10:00000000 r9:be008000 r8:00000001 r7:00000000 r6:809c6af8 r5:00000000
      [ 8864.939252]  r4:809c0d7c
      [ 8864.941841] [<8002eaa0>] (irq_exit) from [<8006f100>] (__handle_domain_irq+0x74/0xe8)
      [ 8864.949688]  r4:809c0d7c r3:00000125
      [ 8864.953342] [<8006f08c>] (__handle_domain_irq) from [<800087a0>] (gic_handle_irq+0x28/0x68)
      [ 8864.961707]  r9:00000000 r8:00000002 r7:c080e100 r6:809c6c6c r5:be07bde8 r4:c080e10c
      [ 8864.969597] [<80008778>] (gic_handle_irq) from [<800133a4>] (__irq_svc+0x44/0x5c)
      [ 8864.977097] Exception stack(0xbe07bde8 to 0xbe07be30)
      [ 8864.982173] bde0:                   00000001 00000001 00000000 00000000 be7c1680 00000000
      [ 8864.990377] be00: be0cfe00 bd93eb40 00000002 00000000 00000000 be07be44 be07be00 be07be30
      [ 8864.998573] be20: 8006278c 806f2934 20000013 ffffffff
      [ 8865.003638]  r7:be07be1c r6:ffffffff r5:20000013 r4:806f2934
      [ 8865.009447] [<806f2904>] (_raw_spin_unlock_irq) from [<80049cfc>] (finish_task_switch+0xa0/0x160)
      [ 8865.018334]  r4:be7c1680 r3:be069380
      [ 8865.021993] [<80049c5c>] (finish_task_switch) from [<806ed614>] (__schedule+0x1e0/0x5dc)
      [ 8865.030098]  r8:be0cfe00 r7:bd23b600 r6:be069380 r5:be3289c0 r4:be7c1680
      [ 8865.036942] [<806ed434>] (__schedule) from [<806edd0c>] (preempt_schedule_common+0x28/0x44)
      [ 8865.045307]  r9:00000000 r8:809d4598 r7:00000001 r6:00000000 r5:be035740 r4:be07a000
      [ 8865.053197] [<806edce4>] (preempt_schedule_common) from [<806edd68>] (_cond_resched+0x40/0x48)
      [ 8865.061822]  r4:be07a000 r3:be07a000
      [ 8865.065472] [<806edd28>] (_cond_resched) from [<8002e860>] (run_ksoftirqd+0x44/0x64)
      [ 8865.073252] [<8002e81c>] (run_ksoftirqd) from [<800494b0>] (smpboot_thread_fn+0x124/0x190)
      [ 8865.081550] [<8004938c>] (smpboot_thread_fn) from [<80045928>] (kthread+0xdc/0xf8)
      [ 8865.089133]  r10:00000000 r9:00000000 r8:00000000 r7:8004938c r6:be035740 r5:be035780
      [ 8865.097097]  r4:00000000 r3:be069380
      [ 8865.100752] [<8004584c>] (kthread) from [<8000ed10>] (ret_from_fork+0x14/0x24)
      [ 8865.107990]  r7:00000000 r6:00000000 r5:8004584c r4:be035780
      [ 8865.113767] Code: e320f000 e4913004 e4914004 e4915004 (e4916004)
      [ 8865.120006] ---[ end trace b0a4c6bd499288ca ]---
      [ 8865.124697] Kernel panic - not syncing: Fatal exception in interrupt
      [ 8865.131084] ---[ end Kernel panic - not syncing: Fatal exception in interrupt
      
      Cc: [v3.19+] stable@vger.kernel.org
      Tested-by: NPeter Chen <peter.chen@freescale.com>
      Signed-off-by: NPeter Chen <peter.chen@freescale.com>
      Signed-off-by: NFugang Duan <B38611@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      61615cd2
  28. 05 2月, 2015 1 次提交