1. 18 10月, 2008 1 次提交
    • C
      [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection · 87e92c06
      Christopher Moore 提交于
      This patch adds TopBottom detection for most Macronix chips with CFI V1.0.
      
      The main purpose of this patch is to add detection of the MX29LV400C B
      used on the LaCie Ethernet Disk mini V2 NAS.
      
      It detects the following parts correctly:-
      MX28F640C3B T
      MX29LV002C  B
      MX29LV002NC B
      MX29LV004C  T
      MX29LV400C  T/B
      MX29LV800C  T/B
      MX29LV160C  T/B
      MX29SL800C  T/B
      MX29SL802C  T/B
      
      It detects the following uniform part as bottom but it should work
      correctly:-
      MX29LV040C
      
      For T parts it causes the erase block table to be reversed correctly.
      For other parts it avoids the bogus "Assuming top" message.
      
      It does not detect the following correctly:-
      MX28F640C3B B
      MX29LV002C  T
      MX29LV002NC T
      MX29LV004C  B
      MX29SL400C  T/B
      MX29SL402C  T/B
      
      If desired I could supply a more complicated patch to handle these as
      well.
      
      Only the MX29LV400C B has been physically tested; others were checked
      against their data sheets.
      Signed-off-by: NChristopher Moore <moore@free.fr>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      87e92c06
  2. 27 9月, 2008 1 次提交
  3. 01 9月, 2008 1 次提交
  4. 07 8月, 2008 1 次提交
  5. 06 8月, 2008 3 次提交
  6. 03 8月, 2008 1 次提交
  7. 02 8月, 2008 1 次提交
  8. 31 7月, 2008 1 次提交
  9. 25 7月, 2008 2 次提交
    • A
      [MTD] jedec_probe: Fix SST 16-bit chip detection · ca6f12c6
      Atsushi Nemoto 提交于
      The unlock_addr rework in kernel 2.6.25 breaks 16-bit SST chips.  SST
      39LF160 and SST 39VF1601 are both 16-bit only chip (do not have BYTE#
      pin) and new uaddr value is not correct for them.  Add
      MTD_UADDR_0xAAAA_0x5555 for those chips.  Tested with SST 39VF1601
      chip.
      Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      ca6f12c6
    • A
      [MTD] [NOR] Fix -ETIMEO errors in CFI driver · 998453fb
      Alexey Korolev 提交于
      Existing CFI driver has problems with excessive writes during erase.
      If CFI driver does many writes during one erase cycle we may face the
      messages with -ETIMEO error on erase operation.  It may cause the
      following data corruption and kernel panics.
      
      The reason of the issue is related to specifics of suspend operation:
      if we write to flash during erase, suspend operation will cost some time
      to erase procedure (for P30 it could be significant). In current version of
      cfi driver the problem of many suspends is partially workarounded by adding
      some time reserv to any operation (8xerase_time) but if we have many writes
      during one erase the problem appears.
      
      This patch detects the suspend and resets timer if suspend occured. It
      has been well verified on different chips. No problems were found.
      Could you please include the patch as it is simple and fixes bad issue.
      Signed-off-by: NAlexey Korolev <akorolev@infradead.org>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      998453fb
  10. 12 7月, 2008 1 次提交
  11. 05 6月, 2008 4 次提交
  12. 14 5月, 2008 1 次提交
  13. 06 5月, 2008 1 次提交
  14. 02 5月, 2008 1 次提交
  15. 23 4月, 2008 5 次提交
  16. 22 4月, 2008 4 次提交
  17. 09 4月, 2008 1 次提交
  18. 05 4月, 2008 1 次提交
  19. 07 2月, 2008 1 次提交
  20. 03 2月, 2008 3 次提交
  21. 12 1月, 2008 1 次提交
  22. 11 1月, 2008 1 次提交
  23. 03 12月, 2007 3 次提交