1. 30 1月, 2008 5 次提交
  2. 20 10月, 2007 2 次提交
    • M
      x86: acpi use cpu_physical_id · 71b31233
      Mike Travis 提交于
      This is from an earlier message from Christoph Lameter:
      
          processor_core.c currently tries to determine the apicid by special casing
          for IA64 and x86. The desired information is readily available via
      
      	    cpu_physical_id()
      
          on IA64, i386 and x86_64.
      Signed-off-by: NChristoph Lameter <clameter@sgi.com>
      
      Additionally, boot_cpu_id needed to be exported to fix compile errors in
      dma code when !CONFIG_SMP.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      71b31233
    • M
      x86: convert cpu_to_apicid to be a per cpu variable · 71fff5e6
      Mike Travis 提交于
      This patch converts the x86_cpu_to_apicid array to be a per cpu
      variable. This saves sizeof(apicid) * NR unused cpus.  Access is mostly
      from startup and CPU HOTPLUG functions.
      
      MP_processor_info() is one of the functions that require access to the
      x86_cpu_to_apicid array before the per_cpu data area is setup.  For this
      case, a pointer to the __initdata array is initialized in setup_arch()
      and removed in smp_prepare_cpus() after the per_cpu data area is
      initialized.
      
      A second change is included to change the initial array value of ARCH
      i386 from 0xff to BAD_APICID to be consistent with ARCH x86_64.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      71fff5e6
  3. 11 10月, 2007 2 次提交
  4. 22 7月, 2007 2 次提交
  5. 09 5月, 2007 1 次提交
  6. 03 5月, 2007 1 次提交
  7. 17 3月, 2007 1 次提交
    • S
      [PATCH] x86-64: fix section mismatch warnings · 43999d9e
      Sam Ravnborg 提交于
      Fix the following section mismatch warnings on x86_64:
      (build using defconfig)
      
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.text:mtrr_bp_init from .text between 'identify_cpu' (at offset 0x65eb) and 'IRQ0x20_interrupt'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data: from .text between 'finish_e820_parsing' (at offset 0x7dc2) and 'early_panic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.text:e820_print_map from .text between 'finish_e820_parsing' (at offset 0x7de1) and 'early_panic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:num_processors from .text between 'acpi_unmap_lsapic' (at offset 0xc88f) and 'acpi_register_ioapic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:disabled_cpus from .text between 'MP_processor_info' (at offset 0x11f35) and 'mp_register_lapic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:num_processors from .text between 'MP_processor_info' (at offset 0x11f6e) and 'mp_register_lapic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:num_processors from .text between 'MP_processor_info' (at offset 0x11f93) and 'mp_register_lapic'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:fix_aperture from .text between 'gart_parse_options' (at offset 0x15517) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:fix_aperture from .text between 'gart_parse_options' (at offset 0x1552c) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_allowed from .text between 'gart_parse_options' (at offset 0x1553d) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_allowed from .text between 'gart_parse_options' (at offset 0x15552) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_allowed from .text between 'gart_parse_options' (at offset 0x15561) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_allowed from .text between 'gart_parse_options' (at offset 0x15577) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:fallback_aper_force from .text between 'gart_parse_options' (at offset 0x1558a) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:fallback_aper_order from .text between 'gart_parse_options' (at offset 0x155bf) and 'iommu_full'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:timer_over_8254 from .text between 'ati_bugs' (at offset 0x16344) and 'via_bugs'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:timer_over_8254 from .text between 'ati_bugs' (at offset 0x16356) and 'via_bugs'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_allowed from .text between 'via_bugs' (at offset 0x16380) and 'nvidia_bugs'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:iommu_aperture_disabled from .text between 'via_bugs' (at offset 0x16397) and 'nvidia_bugs'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:acpi_use_timer_override from .text between 'nvidia_bugs' (at offset 0x163a7) and 'arch_unregister_cpu'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.text:nvidia_hpet_check from .text between 'nvidia_bugs' (at offset 0x163b1) and 'arch_unregister_cpu'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data: from .text between 'nvidia_bugs' (at offset 0x163be) and 'arch_unregister_cpu'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data: from .text between 'nvidia_bugs' (at offset 0x163d1) and 'arch_unregister_cpu'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.data:acpi_skip_timer_override from .text between 'nvidia_bugs' (at offset 0x163e1) and 'arch_unregister_cpu'
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.text:quirk_intel_irqbalance from .text between 'intel_bugs' (at offset 0x1633c) and 'ati_bugs'
      
      But adds:
      WARNING: arch/x86_64/kernel/built-in.o - Section mismatch: reference to .init.text:get_mtrr_state from .text between 'mtrr_bp_init' (at offset 0xb887) and 'ipi_handler'
      
      The warnings does not show up during a normal build due to kbuild
      failing to check for section mismatch in vmlinux.
      To see these warnings run:
      scripts/mod/modpost arch/x86_64/kernel/built-in.o
      
      kbuild will be fixed but the 'noise-level' had to be decresed first.
      There remains a few section mismatch warnigns for x86_64 for areas where I did
      not feel confident.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      43999d9e
  8. 03 2月, 2007 1 次提交
  9. 07 12月, 2006 1 次提交
  10. 04 10月, 2006 1 次提交
  11. 30 9月, 2006 1 次提交
  12. 26 9月, 2006 11 次提交
  13. 01 7月, 2006 1 次提交
  14. 09 5月, 2006 1 次提交
    • K
      [PATCH] x86_64: avoid IRQ0 ioapic pin collision · e0c1e9bf
      Kimball Murray 提交于
      The patch addresses a problem with ACPI SCI interrupt entry, which gets
      re-used, and the IRQ is assigned to another unrelated device.  The patch
      corrects the code such that SCI IRQ is skipped and duplicate entry is
      avoided.  Second issue came up with VIA chipset, the problem was caused by
      original patch assigning IRQs starting 16 and up.  The VIA chipset uses
      4-bit IRQ register for internal interrupt routing, and therefore cannot
      handle IRQ numbers assigned to its devices.  The patch corrects this
      problem by allowing PCI IRQs below 16.
      
      Cc: len.brown@intel.com
      
      Signed-off by: Natalie Protasevich <Natalie.Protasevich@unisys.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e0c1e9bf
  15. 26 3月, 2006 1 次提交
  16. 18 2月, 2006 1 次提交
  17. 28 12月, 2005 1 次提交
  18. 10 12月, 2005 1 次提交
    • B
      [ACPI] ACPICA 20050930 · 50eca3eb
      Bob Moore 提交于
      Completed a major overhaul of the Resource Manager code -
      specifically, optimizations in the area of the AML/internal
      resource conversion code. The code has been optimized to
      simplify and eliminate duplicated code, CPU stack use has
      been decreased by optimizing function parameters and local
      variables, and naming conventions across the manager have
      been standardized for clarity and ease of maintenance (this
      includes function, parameter, variable, and struct/typedef
      names.)
      
      All Resource Manager dispatch and information tables have
      been moved to a single location for clarity and ease of
      maintenance. One new file was created, named "rsinfo.c".
      
      The ACPI return macros (return_ACPI_STATUS, etc.) have
      been modified to guarantee that the argument is
      not evaluated twice, making them less prone to macro
      side-effects. However, since there exists the possibility
      of additional stack use if a particular compiler cannot
      optimize them (such as in the debug generation case),
      the original macros are optionally available.  Note that
      some invocations of the return_VALUE macro may now cause
      size mismatch warnings; the return_UINT8 and return_UINT32
      macros are provided to eliminate these. (From Randy Dunlap)
      
      Implemented a new mechanism to enable debug tracing for
      individual control methods. A new external interface,
      acpi_debug_trace(), is provided to enable this mechanism. The
      intent is to allow the host OS to easily enable and disable
      tracing for problematic control methods. This interface
      can be easily exposed to a user or debugger interface if
      desired. See the file psxface.c for details.
      
      acpi_ut_callocate() will now return a valid pointer if a
      length of zero is specified - a length of one is used
      and a warning is issued. This matches the behavior of
      acpi_ut_allocate().
      Signed-off-by: NBob Moore <robert.moore@intel.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      50eca3eb
  19. 15 11月, 2005 4 次提交
    • A
      [PATCH] x86_64: Increase the maximum number of local APICs to the maximum · 8893166f
      Andi Kleen 提交于
      This is needed for large multinode IBM systems which have a sparse
      APIC space in clustered mode, fully covering the available 8 bits.
      
      The previous kernels would limit the local APIC number to 127,
      which caused it to reject some of the CPUs at boot.
      
      I increased the maximum and shrunk the apic_version array a bit
      to make up for that (the version is only 8 bit, so don't need
      an full int to store)
      
      Cc:  Chris McDermott <lcm@us.ibm.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      8893166f
    • A
      [PATCH] x86_64: New heuristics to find out hotpluggable CPUs. · 420f8f68
      Andi Kleen 提交于
      With a NR_CPUS==128 kernel with CPU hotplug enabled we would waste 4MB
      on per CPU data of all possible CPUs.  The reason was that HOTPLUG
      always set up possible map to NR_CPUS cpus and then we need to allocate
      that much (each per CPU data is roughly ~32k now)
      
      The underlying problem is that ACPI didn't tell us how many hotplug CPUs
      the platform supports.  So the old code just assumed all, which would
      lead to this memory wastage.
      
      This implements some new heuristics:
      
       - If the BIOS specified disabled CPUs in the ACPI/mptables assume they
         can be enabled later (this is bending the ACPI specification a bit,
         but seems like a obvious extension)
       - The user can overwrite it with a new additionals_cpus=NUM option
       - Otherwise use half of the available CPUs or 2, whatever is more.
      
      Cc: ashok.raj@intel.com
      Cc: len.brown@intel.com
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      420f8f68
    • S
      [PATCH] x86_64: Unmap NULL during early bootup · f6c2e333
      Siddha, Suresh B 提交于
      We should zap the low mappings, as soon as possible, so that we can catch
      kernel bugs more effectively. Previously early boot had NULL mapped
      and didn't trap on NULL references.
      
      This patch introduces boot_level4_pgt, which will always have low identity
      addresses mapped.  Druing boot, all the processors will use this as their
      level4 pgt.  On BP, we will switch to init_level4_pgt as soon as we enter C
      code and zap the low mappings as soon as we are done with the usage of
      identity low mapped addresses.  On AP's we will zap the low mappings as
      soon as we jump to C code.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f6c2e333
    • J
      [PATCH] i386/x86-64: Share interrupt vectors when there is a large number of interrupt sources · 6004e1b7
      James Cleverdon 提交于
      Here's a patch that builds on Natalie Protasevich's IRQ compression
      patch and tries to work for MPS boots as well as ACPI.  It is meant for
      a 4-node IBM x460 NUMA box, which was dying because it had interrupt
      pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.
      
      The problem is that this system has 270 GSIs (which are 1:1 mapped with
      I/O APIC RTEs) and an 8-node box would have 540.  This is much bigger
      than NR_IRQS (224 for both i386 and x86_64).  Also, there aren't enough
      vectors to go around.  There are about 190 usable vectors, not counting
      the reserved ones and the unused vectors at 0x20 to 0x2F.  So, my patch
      attempts to compress the GSI range and share vectors by sharing IRQs.
      
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@unisys.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      6004e1b7
  20. 13 9月, 2005 1 次提交