Now that the bulk of at91sam9g20-related nodes are located in at91sam9260.dtsi,
we have to re-create the path to this ADC node for SoC specific parts.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add support for the Ethernut 5 open hardware design, based
on Atmel's AT91SAM9XE512 SoC.
Signed-off-by: NTim Schendekehl <tim.schendekehl@egnite.de>

This patch adds support for the kizbox board (based on at91sam9g20 SoC)
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This will simplify the adding of the A9260.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

We now store the dtb in a nand partition.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add both board revision support 1mmc and 2mmc and use a dtsi for common part.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The at91sam9260 and at91sam9g20 share most of the same IP.
So udpate the node property in the at91sam9g20 only.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

These were incorrectly introduced and can cause problems for of_irq_init.

The correct way to define a root controller is no interrupt-parent set at
all or the interrupt-parent is set to the root controller itself when
inherited from a parent node.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Tested-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Some bootloaders are broken enough to expose an ATAG_MEM with
a null size. Converting such tag to a memory node leads to
an unbootable system.

Skip over zero sized ATAG_MEM to avoid this situation.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

atags_to_fdt() returns 1 when it fails to find a valid FDT signature.
The CONFIG_ARM_ATAG_DTB_COMPAT code is supposed to retry with another
location, but only does so when the initial call doesn't fail.

Fix this by using the correct condition in the assembly code.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Because of the inclusion of skeleton.dtsi, the memory node is
named "memory" we where not modifying the already included one
but creating a new one. It caused bad memory node detection during
early_init_dt_scan_memory() so we modify them.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: devicetree-discuss@lists.ozlabs.org

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Change vbus gpio configuration in .dts files to switch to
active low configuration.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: stable <stable@vger.kernel.org>

All ARCHs have the same definition of MKIMAGE. Move it to Makefile.lib
to avoid duplication.

All ARCHs have similar definitions of cmd_uimage. Place a sufficiently
parameterized version in Makefile.lib to avoid duplication.
Signed-off-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NNicolas Pitre <nico@linaro.org>
Tested-by: Mike Frysinger <vapier@gentoo.org> [Blackfin]
Tested-by: Michal Simek <monstr@monstr.eu> [Microblaze]
Tested-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32]
Signed-off-by: NMichal Marek <mmarek@suse.cz>

Wire up support for the XZ decompressor
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds a generic target for SPEAr600 board that can be
configured via the device-tree. Currently the following devices
are supported via the devicetree:

- VIC interrupts
- PL011 UART
- PL061 GPIO
- Synopsys DW I2C
- Synopsys DW ethernet

Other peripheral devices (e.g. SMI flash, FSMC NAND flash etc) will
follow in later patches.

Only the spear600-evb is currently supported. Other SPEAr600
based boards will follow later.

Since the current mainline SPEAr600 code only supports the SPEAr600
evaluation board, with nearly zero peripheral devices (only UART
and GPIO), it makes sense to switch over to DT based configuration
completely now. So this patch also removes all non-DT stuff, mainly
platform device data. The files spear600.c and spear600_evb.c are
removed completely.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This enables local timer (AKA: private timer) support for
all u8500 based hardware using DT.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This SSP Controller supports a number of serial communication methods
and as such cannot be registered using of_register_spi_devices.
Instead we register it simply as a primecell device.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This provides PL310 Level 2 Cache Controller Device Tree
support for all u8500 based devices.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Enables the 3 UARTs found on a u8500 using DT.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This enables the embedded GIC on all u8500 based hardware using DT.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This adds all devices that are normally present through the
u8500_init_machine function in the device tree as well, which
will duplicate the devices that are visible.

This will not do much by itself because the device from the
device tree are not matched by any device driver until they
are converted as well. The next step is to move over one
device at a time to actually be used from the device tree
instead of the hardcoded device using auxdata to pass the
correct platform_data.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

db8500.dtsi can be used by all systems with a db8500 or
db9500 SoC, while snowball.dts is board specific.
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This provides very basic Device Tree support for ST-Ericsson's
low-cost development platform, Snowball. If Device Tree for
ux500 is enabled and the correct board is configured within the
Device Tree blob, the correct *_init_machine() will be called.

This patch is based on some original work completed by:
  Niklas Hernaeus <niklas.hernaeus@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NNiklas Hernaeus <niklas.hernaeus@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NJason Cooper <jason@lakedaemon.net>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Define both uarts in kirkwood.dtsi as they are common to all kirkwood
SoCs.  Each board may enable all or none of them, so they are disabled
by default.  uart0 is enabled for the dreamplug.

tclk can vary for each board, so we leave it undefined in the kirkwood
dtsi.  Each board can then set it as appropriate when enabling the uart.
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Also, use inclusive register size for uart0.
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

make the ECHI depends on ARCH_AT91
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org

Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>