Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Renamed functions in 85xx_ds from 8544 to 85xx.

Kept an unique machine def/probe for the MPC8544 DS board to
handle some subtle differences between the future board based
on the DS platform.

Also fixed building w/o CONFIG_PCI and minor whitespace fixes.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Renamed the mpc8544_ds.c board code to mpc85xx_ds.c to make it more
generic in prep for other boards based on the same platform.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We needed some ifdef CONFIG_PCI protection for pcibios_fixup so we
can build !CONFIG_PCI.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Remove includes of files that existed in arch/ppc that we dont need in
arch/powerpc anymore.  The following includes were removed:

 <asm/amigappc.h>
 <asm/bootinfo.h>
 <asm/ppcboot.h>
 <asm/ppc_sys.h>
 <asm/residual.h>
 <asm/m8260_pci.h>

This also caused platforms/embedded6xx/mpc7448_hpc2.h to no longer be
needed and thus removed.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The interrupt routing in the device trees for the ULI M1575 was
inproperly using the interrupt line field as pci function.  Fixed
up the device tree's to actual conform for to specification and
changed the interrupt mapping code so it just uses a static mapping
setup as follows:

PIRQA - IRQ9
PIRQB - IRQ10
PIRQC - IRQ11
PIRQD - IRQ12
USB 1.1 OCHI (1c.0) - IRQ12
USB 1.1 OCHI (1c.1) - IRQ9
USB 1.1 OCHI (1c.2) - IRQ10
USB 1.1 ECHI (1c.3) - IRQ11
LAN (1b.0) - IRQ6
AC97 (1d.0) - IRQ6
Modem (1d.1) - IRQ6
HD Audio (1d.2) - IRQ6
SATA (1f.1) - IRQ5
SMB (1e.1) - IRQ7
PMU (1e.2) - IRQ7
PATA (1f.0) - IRQ14/15

Took the oppurtunity to refactor the code into a single file so we
don't have to duplicate these fixes on the two current boards in the
tree and several forth coming boards that will also need the code.

Fixed RTC support that requires a dummy memory read on the P2P bridge
to unlock the RTC and setup the default of the RTC alarm registers to
match with a basic x86 style CMOS RTC.

Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure
the PCI IO space has been setup properly before we start poking ISA
registers at random locations.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This reverts commit 3baee955.

That commit was a mistake from the start; I added mdio type to the
bus scan list early on in my ucc_geth migrate to phylib development,
which is just pure wrong (the ucc_geth_mii driver creates the mii
bus and the PHY layer handles PHY enumeration without translation).

This follows on from commit 77926826:

 Revert "[POWERPC] Don't complain if size-cells == 0 in prom_parse()"

which was basically trying to hide a symptom of the original mistake
this revert fixes.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Setting the host bridge @8000 as primary. Also fixing a bug in
setting the USB interrupt numbers.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The interrupts of an E100 card inserted in PCI slot 4 may be on at bootup.
The resulting interrupt flood interacts with the 8259 cascade handler and
prevents proper boot up. There is a quirk for the E100 that will disable
the E100's interrupts but to use it, the 8259 cascade hookup must be
delayed until after the quirk has run. This patch delays the 8259 cascade
hookup by registering a device_initcall() which runs after the PCI quirk
for the E100.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The current 85xxCDS restart code fails to reset the PCI bus which can
lead to odd behavior after the restart. This patch uses the VIA Super
Southbridge to perform a PCI reset which will reset the entire system.
NOTE: Since the VIA chip is behind a PCI-to-PCI bridge which can be
disabled with a switch setting, it may not be possible to perform the
PCI bus reset. In this case, the code defaults to the previous restart
mechanism.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy
8259 interrupt controller pair contained within a VIA VT82C686B Southbridge
on the main carrier board. The processor complex plugs into the carrier
card using a PCI slot which limits the available interrupts to the
INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed
through a gate array and connected to the PCI INTA interrupt line.
The normal interrupt chaining hook (set_irq_chained_handler) does
not allow sharing of the chained interrupt which prevents the
use of PCI INTA by PCI devices. This patch allows the 8259 cascade
pair to share their interrupt line with PCI devices.

NOTE: The addition of the .end routine for the MPIC is not strictly
necessary for this patch. It's there so this code will run from within
the threaded interrupt context used by the Real Time patch.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add basic support for the PCIe PHB and enable the ULI bridge.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The newer Arcadia boards for CDS have an FPGA that shows up on PCI
however isn't a real PCI device.  Add a quirk to just ignore the
FPGA.

This is based on the following patch from Andy & York:

http://ozlabs.org/pipermail/linuxppc-dev/2007-February/032042.htmlSigned-off-by: NKumar Gala <galak@kernel.crashing.org>

Added the PCIe device node to the 8568 dts and the needed quirk entries.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On the 85xx/86xx PCIe controllers if there is no device connected to the
PHB we will still allocate a pci_bus for downstream bus of the virtual
P2P bridge. However the resources allocated to the downstream bus are not
correct and so we just mimic the resources from the upstream pci_bus.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Switch the 85xx platform over to using the FSL generic PCI code.  This
gets ups PCIe support in addition to base PCI support.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Remove redundant pci_read_irq_line() function for 85xx CDS board.
This function has been realized in common ppc pci code.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Acked-by: NAndy Fleming <afleming@freescale.com>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Begin with MPC8548 a new reset control register is added that asserts
HRESET_REQ to board logic.

This register is used for chip reset.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Make the ppc32 pcibios_alloc_controller take a device node to match
the ppc64 prototypes and have it set arch_data.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Removed the remants of bus_offset and use self_busno in the mv64x60 case
and use pci_assign_all_buses on 83xx/85xx.

83xx/85xx have multiple PHBs and the firmwares on these devices tend not
to handle topologies with P2P bridges well so we let Linux just reassign
the bus numbers to match.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Now that we have the pci_controller in the exclude function we can easy
figure out if the bus number is the PHB or not.  The old style of using a
variable setup at init time was actually broken and would only work in
specific cases.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

There are times that we need to know which controller we are on to decide
how to exclude devices properly.  We now pass the pci_controller that we
are going to use down to the pci_exclude_device function. This will
greatly simplify being able to exclude the PHBs in multiple controller
setups.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The Freescale and Marvell PCI controllers dont require explicit setting for
type 1 config cycles.  They handle producing them by implicitly looking at the
bus, devfn.

The TSI108 and 52xx don't use the generic PCI indirect code and thus don't
bother with set_cfg_type.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

When CONFIG_PCI is disabled, the definitions for isa_io_base,
isa_mem_base and pci_dram_offset are entirely unused, but they
can result in link failure because they are defined in multiple
places.

The easiest fix is to just remove all these definitions.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Many platforms currently define their own add_bridge function, some
of them globally. This breaks some multiplatform configurations.
Prefixing each of these functions with the platform name avoids
this problem.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

for consistency with other Open Firmware interfaces (and Sparc).

This is just a straight replacement.

This leaves the compatibility define in place.
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Add 'mdio' to bus scan id list for platforms with QE UEC
as a consequence of converting UEC mdio driver to an
of_platform driver in the ucc_geth phylib conversion patch.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Moved 85xx platform Kconfig over to being sourced by the unified
arch/powerpc/platforms/Kconfig.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This patch provides the basic MPC8544 DS platform code and config.
Follow-up patches will add peripherals such as PCI and SATA.
Signed-off-by: NXianghua Xiao <x.xiao@freescale.com>
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NAndy Fleming <afleming@freescale.com>
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On chip 8250 UARTs share an interrupts on existing 85xx processors.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Renamed the MPC8568 MDS platform code to follow other 85xx boards.  There
isn't anything specific about the 8568 MDS code that wouldn't apply to another
85xx MDS system at this point.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Cleaned up the probing functionality to be more consistent across all 85xx
boards and actually check to see if we should be running on a given board.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add support for the MPC8568 MDS reference board
Signed-off-by: NAndrew Fleming <afleming@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Marked a number of functions in 85xx board code as static.  Also, some minor
whitespace cleanup
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

In order to suppose platforms with devices above 4Gb on 32 bits platforms
with a >32 bits physical address space, we used to have a special ioremap64
along with a fixup routine fixup_bigphys_addr.

This shouldn't be necessary anymore as struct resource now supports 64 bits
addresses even on 32 bits archs. This patch enables that option when
CONFIG_PHYS_64BIT is set and removes ioremap64 and fixup_bigphys_addr.

This is a preliminary work for the upcoming merge of 32 and 64 bits io.h
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This patch reworks the way IRQs are fixed up on PCI for arch powerpc.

It makes pci_read_irq_line() called by default in the PCI code for
devices that are probed, and add an optional per-device fixup in
ppc_md for platforms that really need to correct what they obtain
from pci_read_irq_line().

It also removes ppc_md.irq_bus_setup which was only used by pSeries
and should not be needed anymore.

I've also removed the pSeries s7a workaround as it can't work with
the current interrupt code anyway. I'm trying to get one of these
machines working so I can test a proper fix for that problem.

I also haven't updated the old-style fixup code from 85xx_cds.c
because it's actually buggy :) It assigns pci_dev->irq hard coded
numbers which is no good with the new IRQ mapping code. It should
at least use irq_create_mapping(NULL, hard_coded_number); and possibly
also set_irq_type() to set them as level low.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NPaul Mackerras <paulus@samba.org>