1. 04 8月, 2009 2 次提交
  2. 09 6月, 2009 1 次提交
    • J
      x86, UV: Fix macros for multiple coherency domains · c4ed3f04
      Jack Steiner 提交于
      Fix bug in the SGI UV macros that support systems with multiple
      coherency domains.  The macros used for referencing global MMR
      (chipset registers) are failing to correctly "or" the NASID
      (node identifier) bits that reside above M+N. These high bits
      are supplied automatically by the chipset for memory accesses
      coming from the processor socket.
      
      However, the bits must be present for references to the special
      global MMR space used to map chipset registers. (See uv_hub.h
      for more details ...)
      
      The bug results in references to invalid/incorrect nodes.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Cc: <stable@kernel.org>
      LKML-Reference: <20090608154405.GA16395@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c4ed3f04
  3. 03 4月, 2009 2 次提交
  4. 05 3月, 2009 1 次提交
  5. 17 12月, 2008 1 次提交
    • J
      x86: UV fix for global physical addresses · 189f67c4
      Jack Steiner 提交于
      Impact: fix UV boot crash
      
      This fixes a UV bug related to generating global memory addresses
      on partitioned systems. Partition systems do not have physical memory
      at address 0. Instead, a chunk of high memory is remapped by the chipset
      so that it appears to be at address 0. This remapping is INVISIBLE to most
      of the OS. The only OS functions that need to be aware of the remaping are
      functions that directly interface to the chipset. The GRU is one example.
      
      Also, delete a couple of unused macros related to global memory addresses.
      Signed-off-by: NJack Steiner <steiner@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      189f67c4
  6. 31 10月, 2008 1 次提交
  7. 28 10月, 2008 1 次提交
  8. 27 10月, 2008 1 次提交
    • M
      x86/uv: provide a System Activity Indicator driver · 7f1baa06
      Mike Travis 提交于
      Impact: start per CPU heartbeat LED timers on SGI UV systems
      
      The SGI UV system has no LEDS but uses one of the system controller
      regs to indicate the online internal state of the cpu.  There is a
      heartbeat bit indicating that the cpu is responding to interrupts,
      and an idle bit indicating whether the cpu is idle when the heartbeat
      interrupt occurs.  The current period is one second.
      
      When a cpu panics, an error code is written by BIOS to this same reg.
      
      This patchset provides the following:
      
        * x86_64: Add base functionality for writing to the specific SCIR's
          for each cpu.
      
        * heartbeat: Invert "heartbeat" bit to indicate the cpu is
          "interruptible".  If the current thread is the idle thread,
          then indicate system is "idle".
      
        * if hotplug enabled, all bits are set (0xff) when the cpu is disabled.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7f1baa06
  9. 23 10月, 2008 3 次提交
  10. 23 7月, 2008 1 次提交
    • V
      x86: consolidate header guards · 77ef50a5
      Vegard Nossum 提交于
      This patch is the result of an automatic script that consolidates the
      format of all the headers in include/asm-x86/.
      
      The format:
      
      1. No leading underscore. Names with leading underscores are reserved.
      2. Pathname components are separated by two underscores. So we can
         distinguish between mm_types.h and mm/types.h.
      3. Everything except letters and numbers are turned into single
         underscores.
      Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com>
      77ef50a5
  11. 09 7月, 2008 1 次提交
  12. 02 6月, 2008 1 次提交
  13. 17 4月, 2008 2 次提交