- 12 2月, 2014 2 次提交
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由 Rohit Vaswani 提交于
Implement support for the Krait CPU release sequence when the CPUs are part of the first version of the krait processor subsystem. Signed-off-by: NRohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Rohit Vaswani 提交于
This makes it easy to add SMP support for new devices by keying on a device node for the release sequence. We add the enable-method property for the cpus property to specify that we want to use the gcc-msm8660 release sequence (which is going to look for the global clock controller device node to map some Scorpion specific power and control registers). We also remove the nr_cpus detection code as that is done generically in the DT CPU detection code. Signed-off-by: NRohit Vaswani <rvaswani@codeaurora.org> [sboyd: Port to CPU_METHOD_OF_DECLARE] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 07 2月, 2014 2 次提交
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由 Kumar Gala 提交于
As mach-qcom will support a number of different Qualcomm SoC platforms we replace the msm prefix on function names with qcom to be a bit more generic. Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Kumar Gala 提交于
Introduce a new mach-qcom that will support SoCs that intend to be multiplatform compatible while keeping mach-msm to legacy SoC/board support that will not transition over to multiplatform. As part of this, we move support for MSM8X60, MSM8960 and MSM8974 over to mach-qcom. Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 05 2月, 2014 2 次提交
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由 Kumar Gala 提交于
Right now hotplug.c only really implements msm_cpu_die as a wfi. Just move that implementation into platsmp.c. At the same time we use the existing wfi() instead of inline asm. Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Rohit Vaswani 提交于
pen_release is no longer required as the synchronization is now managed by generic arm code. This is done as suggested in https://lkml.org/lkml/2013/6/4/184 Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NRohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 12 12月, 2013 1 次提交
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由 Nicolas Pitre 提交于
We have a handy macro to replace open coded __cpuc_flush_dcache_area(() and outer_clean_range() sequences. Let's use it. No functional change. Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 15 7月, 2013 1 次提交
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由 Paul Gortmaker 提交于
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the ARM uses of the __cpuinit macros from C code, and all __CPUINIT from assembly code. It also had two ".previous" section statements that were paired off against __CPUINIT (aka .section ".cpuinit.text") that also get removed here. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 27 3月, 2013 1 次提交
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由 Catalin Marinas 提交于
All the calls to gic_secondary_init() pass 0 as the first argument. Since this function is called on each CPU when starting, it can be done in a platform-independent way via a CPU notifier registered by the GIC code. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Tested-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NSrinidhi Kasagar <srinidhi.kasagar@stericsson.com> Tested-by: NDinh Nguyen <dinguyen@altera.com> Acked-by: NNicolas Pitre <nico@linaro.org> Tested-by: NMarc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Barry Song <baohua.song@csr.com>
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- 13 1月, 2013 1 次提交
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由 Rob Herring 提交于
Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
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- 11 1月, 2013 1 次提交
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由 Rob Herring 提交于
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NStephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
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- 22 9月, 2012 1 次提交
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由 David Brown 提交于
No real need to have a separate core.h from the common.h file. Fold these two prototypes into the common header file. Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 14 9月, 2012 3 次提交
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由 Marc Zyngier 提交于
Almost each SMP platform defines pen_release to manage booting secondary CPUs. This of course clashes with the single zImage effort. Add the pen_release definition to the ARM SMP code, and remove all others. This should only be used by platforms which lack any kind of CPU power management... Reported-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Marc Zyngier 提交于
Convert MSM SMP platforms to use struct smp_operations to provide their SMP and CPU hotplug operations. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NNicolas Pitre <nico@linaro.org> Cc: David Brown <davidb@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Boyd 提交于
The MSM code has some antiquated register writes to set up the PPIs to be edge triggered. Now that we have the percpu irq interface we don't need this code so let's remove it and update the percpu irq user (msm_timer) to set the irq type. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 10 7月, 2012 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 1月, 2012 1 次提交
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由 Will Deacon 提交于
It turns out that the logical CPU mapping is useful even when !CONFIG_SMP for manipulation of devices like interrupt and power controllers when running a UP kernel on a CPU other than 0. This can happen when kexecing a UP image from an SMP kernel. In the future, multi-cluster systems running AMP configurations will require something similar for mapping cluster IDs, so it makes sense to decouple this logic in preparation for this support. Acked-by: NYang Bai <hamo.by@gmail.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reported-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 11月, 2011 1 次提交
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由 Stephen Boyd 提交于
Fixes a handful of sparse warnings. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 21 10月, 2011 1 次提交
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由 Russell King 提交于
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: NMark Salter <msalter@redhat.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 10月, 2011 1 次提交
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由 Will Deacon 提交于
This patch uses the new cpu_logical_map() macro for converting logical CPU numbers into physical numbers when dealing with the pen_release variable in the SMP boot and CPU hotplug paths. Tested-and-acked-by: NDavid Brown <davidb@codeaurora.org> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 21 7月, 2011 1 次提交
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由 Jeff Ohlstein 提交于
Previously we just assumed there were CONFIG_NR_CPUS cpus present in the system. Instead, figure out the number of cpus from the MIDR register. Signed-off-by: NJeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org> [arnd: clarified patch title] Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 07 7月, 2011 1 次提交
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由 Stephen Boyd 提交于
If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 1 次提交
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由 Russell King 提交于
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 08 1月, 2011 1 次提交
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由 Jeff Ohlstein 提交于
Signed-off-by: NJeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 20 12月, 2010 4 次提交
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由 Russell King 提交于
There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 12月, 2010 1 次提交
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由 Russell King 提交于
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 12月, 2010 1 次提交
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由 Russell King 提交于
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 8月, 2010 1 次提交
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由 Changhwan Youn 提交于
Following occurs on boot message without this patch. CPU1: processor failed to boot Brought up 1 CPUs SMP: Total of 1 processors activated... This patch adds SYSRAM mapping for fixing Secondary CPU startup. CPU1: Booted secondary processor Brought up 2 CPUs SMP: Total of 2 processors activated... Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 05 8月, 2010 1 次提交
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由 Changhwan Youn 提交于
This patch adds Samsung S5PV310/S5PC210 CPU support. The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core. Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Signed-off-by: NJongpill Lee <boyko.lee@samsung.com> Signed-off-by: NJiseong Oh <jiseong.oh@samsung.com> [kgene.kim@samsung.com: fix build errors] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 02 5月, 2010 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 11月, 2009 1 次提交
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由 Colin Tuckley 提交于
The platsmp.c file defines the REALVIEW_SYS_FLAGS* macros which are already present in platform.h. Just use the latter. Signed-off-by: NColin Tuckley <colin.tuckley@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 24 7月, 2009 1 次提交
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由 Catalin Marinas 提交于
This patch sets bit 0 in the startup address passed to the secondary CPUs so that they branch into Thumb-2 mode. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 30 5月, 2009 1 次提交
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由 Colin Tuckley 提交于
This is a RealView platform supporting core tiles with ARM11MPCore, Cortex-A8 or Cortex-A9 (multicore) processors. It has support for MMC, CompactFlash, PCI-E. Signed-off-by: NColin Tuckley <colin.tuckley@arm.com> Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 28 5月, 2009 1 次提交
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由 Russell King 提交于
Convert cpu_*_mask bit twiddling to the new set_cpu_*() API. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 5月, 2009 3 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The SCU can be used by non-realview platforms, so make it visible for other people to use rather than having them copy the header file. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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