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  1. 08 1月, 2013 1 次提交
    • B
      EDAC: Fix EDAC Kconfig menu · 54451663
      由 Borislav Petkov 提交于 
      After f65aad41("MIPS: Cavium: Add EDAC support."), when entering
the "Device Drivers" toplevel menu in menuconfig, the suboptions behind
EDAC appeared merged with the rest of the device drivers types. This was
because the menuconfig option EDAC is querying an EDAC_SUPPORT Kconfig
bool which was defined after the menu definition.

When pushing EDAC_SUPPORT up, before the menu definition, the variable
is defined earlier and the above menuconfig artifact doesn't happen.

Drop a useless menuconfig comment while at it.

Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: NBorislav Petkov <bp@alien8.de>
      54451663
  3. 12 12月, 2012 1 次提交
    • R
      MIPS: Cavium: Add EDAC support. · f65aad41
      由 Ralf Baechle 提交于 
      Drivers for EDAC on Cavium.  Supported subsystems are:

 o CPU primary caches.  These are parity protected only, so only error
   reporting.
 o Second level cache - ECC protected, provides SECDED.
 o Memory: ECC / SECDEC if used with suitable DRAM modules.  The driver will
   will only initialize if ECC is enabled on a system so is safe to run on
   non-ECC memory.
 o PCI: Parity error reporting

Since it is very hard to test this sort of code the implementation is very
conservative and uses polling where possible for now.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Reviewed-by: NBorislav Petkov <borislav.petkov@amd.com>
      f65aad41
  5. 28 11月, 2012 1 次提交
  7. 27 6月, 2012 2 次提交
  9. 12 6月, 2012 1 次提交
    • M
      edac: add a new per-dimm API and make the old per-virtual-rank API obsolete · 19974710
      由 Mauro Carvalho Chehab 提交于 
      The old EDAC API is broken. It only works fine for systems manufatured
before 2005 and for AMD 64. The reason is that it forces all memory
controller drivers to discover rank info.

Also, it doesn't allow grouping the several ranks into a DIMM.

So, what almost all modern drivers do is to create a fake virtual-rank
information, and use it to cheat the EDAC core to accept the driver.

While this works if the user has enough time to discover what DIMM slot
corresponds to each "virtual-rank" information, it prevents EDAC usage
for users with less available time. It also makes life hard for vendors
that may want to provide a table with their motherboards to the userspace
tool (edac-utils) as each driver has its own logic for the virtual
mapping.

So, the old API should be removed, in favor of a more flexible API that
allows newer drivers to not lie to the EDAC core.
Reviewed-by: NAristeu Rozanski <arozansk@redhat.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Josh Boyer <jwboyer@redhat.com>
Cc: Hui Wang <jason77.wang@gmail.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      19974710
  11. 22 3月, 2012 2 次提交
  13. 04 11月, 2011 1 次提交
  15. 01 11月, 2011 4 次提交
  17. 11 8月, 2011 2 次提交
  19. 31 3月, 2011 1 次提交
  21. 11 3月, 2011 1 次提交
  23. 07 1月, 2011 1 次提交
  25. 21 10月, 2010 1 次提交
    • B
      EDAC, MCE: Rework MCE injection · 9cdeb404
      由 Borislav Petkov 提交于 
      Add sysfs injection facilities for testing of the MCE decoding code.
Remove large parts of amd64_edac_dbg.c, as a result, which did only
NB MCE injection anyway and the new injection code supports that
functionality already.

Add an injection module so that MCE decoding code in production kernels
like those in RHEL and SLES can be tested.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      9cdeb404
  27. 21 9月, 2010 1 次提交
  29. 31 8月, 2010 1 次提交
  31. 03 8月, 2010 1 次提交
  33. 21 7月, 2010 1 次提交
  35. 10 5月, 2010 3 次提交
  37. 02 10月, 2009 1 次提交
    • B
      x86: EDAC: carve out AMD MCE decoding logic · 0d18b2e3
      由 Borislav Petkov 提交于 
      This converts the MCE decoding logic into a standalone config
option which can be built-in or a module, the first one being the
default for MCEs happening early on in the boot process.

This, beyond being separated in a cleaner way, also saves RAM by
making the decoding logic modular.
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
LKML-Reference: <20091002133148.GD28682@aftab>
Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0d18b2e3
  39. 24 9月, 2009 2 次提交
  41. 16 9月, 2009 1 次提交
    • I
      amd64_edac: build driver only on AMD hardware · b9183f9b
      由 Ingo Molnar 提交于 
      -tip testing found the following build failure (config attached):

drivers/built-in.o: In function `amd64_check':
amd64_edac.c:(.text+0x3e9491): undefined reference to `amd_decode_nb_mce'
drivers/built-in.o: In function `amd64_init_2nd_stage':
amd64_edac.c:(.text+0x3e9b46): undefined reference to `amd_report_gart_errors'
amd64_edac.c:(.text+0x3e9b55): undefined reference to `amd_register_ecc_decoder'
drivers/built-in.o: In function `amd64_nbea_store':
amd64_edac_dbg.c:(.text+0x3ea22e): undefined reference to `amd_decode_nb_mce'
drivers/built-in.o: In function `amd64_remove_one_instance':
amd64_edac.c:(.devexit.text+0x3eea): undefined reference to `amd_report_gart_errors'
amd64_edac.c:(.devexit.text+0x3ef6): undefined reference to `amd_unregister_ecc_decoder'

the AMD EDAC code has a dependency on CONFIG_CPU_SUP_AMD facilities. The
patch below solves the problem here.
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
      b9183f9b
  43. 19 6月, 2009 2 次提交
  45. 10 6月, 2009 3 次提交
  47. 29 5月, 2009 1 次提交
  49. 03 4月, 2009 4 次提交